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330 lines
20 KiB
330 lines
20 KiB
;* ======================================================================== *;
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;* TEXAS INSTRUMENTS, INC. *;
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;* *;
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;* DSPLIB DSP Signal Processing Library *;
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;* *;
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;* Release: Revision 1.04b *;
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;* CVS Revision: 1.5 Sun Sep 29 03:32:22 2002 (UTC) *;
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;* Snapshot date: 23-Oct-2003 *;
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;* *;
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;* This library contains proprietary intellectual property of Texas *;
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;* Instruments, Inc. The library and its source code are protected by *;
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;* various copyrights, and portions may also be protected by patents or *;
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;* other legal protections. *;
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;* *;
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;* This software is licensed for use with Texas Instruments TMS320 *;
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;* family DSPs. This license was provided to you prior to installing *;
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;* the software. You may review this license by consulting the file *;
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;* TI_license.PDF which accompanies the files in this library. *;
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;* ------------------------------------------------------------------------ *;
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;* Copyright (C) 2003 Texas Instruments, Incorporated. *;
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;* All Rights Reserved. *;
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;* ======================================================================== *;
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;* ======================================================================== *;
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;* Assembler compatibility shim for assembling 4.30 and later code on *;
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;* tools prior to 4.30. *;
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;* ======================================================================== *;
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.if $isdefed(".ASSEMBLER_VERSION")
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.asg .ASSEMBLER_VERSION, $asmver
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.else
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.asg 0, $asmver
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.endif
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.if ($asmver < 430)
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.asg B, CALL ; Function Call
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.asg B, RET ; Return from a Function
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.asg B, CALLRET ; Function call with Call / Ret chaining.
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.if .TMS320C6400
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.asg BNOP, CALLNOP ; C64x BNOP as a Fn. Call
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.asg BNOP, RETNOP ; C64x BNOP as a Fn. Return
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.asg BNOP, CRNOP ; C64x Fn call w/, Call/Ret chaining via BNOP.
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.endif
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.asg , .asmfunc ; .func equivalent for hand-assembly code
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.asg , .endasmfunc ; .endfunc equivalent for hand-assembly code
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.endif
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;* ======================================================================== *;
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;* End of assembler compatibility shim. *;
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;* ======================================================================== *;
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* ========================================================================= *
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* TEXAS INSTRUMENTS, INC. *
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* *
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* NAME *
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* DSP_fir_r8: FIR Filter (radix 8) *
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* *
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* REVISION DATE *
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* 10-Aug-2001 *
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* *
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* USAGE *
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* This routine is C-callable and can be called as: *
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* *
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* void DSP_fir_r8 *
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* ( *
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* const short *restrict x, /* Input array [nr+nh-1 elements] */ *
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* const short *restrict h, /* Coeff array [nh elements] */ *
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* short *restrict r, /* Output array [nr elements] */ *
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* int nh, /* Number of coefficients. */ *
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* int nr /* Number of output samples. */ *
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* ) *
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* *
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* ARGUMENTS PASSED *
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* *x -> A4 *
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* *h -> B4 *
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* *r -> A6 *
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* nh -> B6 *
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* nr -> A8 *
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* *
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* DESCRIPTION *
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* Computes a real FIR filter (direct-form) using coefficients *
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* stored in vector h. The real data input is stored in vector x. *
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* The filter output result is stored in vector r. Input data and *
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* filter taps are 16-bit, with intermediate values kept at 32-bit *
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* precision. Filter taps are expected in Q15 format. *
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* *
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* The following is a natural C implementation with no restrictions. *
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* This version has restrictions as noted in the ASSUMPTIONS below. *
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* *
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* void DSP_fir_r8 *
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* ( *
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* const short *restrict x, *
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* const short *restrict h, *
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* short *restrict r, *
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* int nh, *
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* int nr *
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* ) *
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* { *
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* int i, j, sum; *
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* *
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* for (j = 0; j < nr; j++) *
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* { *
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* sum = 0; *
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* for (i = 0; i < nh; i++) *
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* sum += x[i + j] * h[i]; *
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* r[j] = sum >> 15; *
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* } *
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* } *
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* *
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* ASSUMPTIONS *
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* Number of taps: 'nh' >= 8, multiple of 8 *
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* Number of samples: 'nr' >= 4, multiple of 4 *
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* Array 'r' is word aligned. *
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* *
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* NOTES *
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* This function blocks interrupts for its entire duration. It is *
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* interrupt tolerant, but not interruptible. *
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* *
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* MEMORY NOTE *
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* No memory bank hits under any conditions. *
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* This code is a LITTLE ENDIAN implementation. *
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* *
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* TECHNIQUES *
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* 1. Load double word instruction is used to simultaneously load *
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* four values in a single clock cycle. *
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* *
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* 2. The inner loop is unrolled four times and will always *
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* compute a multiple of 4 of nr. *
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* *
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* 3. The outer loop is conditionally exected in parallel with the *
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* inner loop. This allows for a zero overhead outer loop. *
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* *
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* CYCLES *
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* nh * nr/4 + 17 *
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* *
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* For nh = 32 and nr = 36, cycles = 305. *
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* *
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* CODESIZE *
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* 336 bytes. *
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* *
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* ------------------------------------------------------------------------- *
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* Copyright (c) 2003 Texas Instruments, Incorporated. *
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* All Rights Reserved. *
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* ========================================================================= *
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; ===================== SYMBOLIC REGISTER ASSIGNMENTS ===================== ;
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.asg A0, A_i ; inner loop flag;when = 0,branch to iloop
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.asg A1, A_i1 ; delayed i_cnt
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.asg A2, A_s ; flag for adding 1st sum
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.asg A4, A_x_ptr ; input array pointer
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.asg A5, A_r2 ; output: r[2]
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.asg A6, A_r_ptr ; output ptr that init. point to r[0]
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.asg A8, A_nr ; number of output samples
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.asg A9, A_x_offset ; offset to reset input ptr for next loop
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.asg A16, A_x54 ; input: x[5:4]
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.asg A17, A_x76 ; input: x[7:6]
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.asg A20, A_h10 ; input: h[1:0]
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.asg A21, A_h32 ; input: h[3:2]
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.asg A22, A_h54 ; input: h[5:4]
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.asg A23, A_h76 ; input: h[7:6]
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.asg A24, A_sum0 ; sum0
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.asg A25, A_sum2 ; sum2
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.asg A26, A_prod0_32 ; = x[3]*h[3] + x[2]*h[2]
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.asg A26, A_prod0_54 ; = x[5]*h[5] + x[4]*h[4]
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.asg A26, A_prod0_76 ; = x[7]*h[7] + x[6]*h[6]
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.asg A27, A_prod2_32 ; = x[5]*h[3] + x[4]*h[2]
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.asg A27, A_prod2_54 ; = x[7]*h[5] + x[6]*h[4]
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.asg A27, A_prod2_76 ; = x[9]*h[7] + x[8]*h[6]
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.asg A28, A_prod0_10 ; = x[1]*h[1] + x[0]*h[0]
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.asg A29, A_prod2_10 ; = x[3]*h[1] + x[2]*h[0]
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.asg A28, A_sum0a ; sum0
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.asg A29, A_sum2a ; sum2
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.asg A30, A_r0 ; output: r[0]
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.asg A31, A_r1 ; output: r[1]
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.asg A31, A_r10 ; output: r[1:0]
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.asg B0, B_j ; outer loop count
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.asg B1, B_i2 ; 2nd delayed i_cnt
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.asg B4, B_h_ptr ; coef array pointer
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.asg B5, B_x18 ; input: x[1:8]
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.asg B6, B_nh ; number of coefficients
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.asg B7, B_r_ptr ; output ptr that init. point to r[2]
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.asg B8, B_x3a ; input: x[3:10]
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.asg B9, B_h_offset ; offset to reset coef ptr for next loop
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.asg B16, B_x10 ; input: x[1:0]
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.asg B17, B_x32 ; input: x[3:2]
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.asg B18, B_x98 ; input: x[9:8]
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.asg B19, B_xba ; input: x[11:10]
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.asg B20, B_h0X ; coef: h[0:-1]
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.asg B21, B_h21 ; coef: h[2:1]
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.asg B22, B_h43 ; coef: h[4:3]
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.asg B23, B_h65 ; coef: h[6:5]
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.asg B24, B_sum1 ; sum1
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.asg B25, B_sum3 ; sum3
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.asg B26, B_prod1_21 ; = x[3]*h[2] + x[2]*h[1]
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.asg B26, B_prod1_65 ; = x[7]*h[6] + x[6]*h[5]
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.asg B26, B_prod1_07 ; = x[1]*h[0] + x[8]*h[7]
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.asg B27, B_prod3_21 ; = x[5]*h[2] + x[4]*h[1]
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.asg B27, B_prod3_65 ; = x[9]*h[6] + x[8]*h[5]
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.asg B27, B_prod3_07 ; = x[3]*h[0] + x[a]*h[7]
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.asg B28, B_prod1_43 ; = x[5]*h[4] + x[4]*h[3]
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.asg B28, B_sum1a ; sum1
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.asg B29, B_prod3_43 ; = x[7]*h[4] + x[6]*h[3]
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.asg B29, B_sum3a ; sum3
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.asg B30, B_h07 ; input: h[0:7]
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.asg B31, B_r3 ; output: r[3]
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.asg B31, B_r32 ; output: r[3:2]
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.sect ".text:_fir_r8"
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.global _DSP_fir_r8
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_DSP_fir_r8:
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; ======================= SETUP / LOOP PIPE-UP CODE ======================= ;
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LDNDW .D1T2 *A_x_ptr++,B_x32:B_x10 ; load input: x[3:2]:x[1:0]
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|| ADD .L1 3,A_nr,A_nr ; nr + 3
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LDNDW .D2T1 *B_h_ptr++,A_h32:A_h10 ; load coef: h[3:2]:h[1:0]
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LDNDW .D2T2 *-B_h_ptr(10),B_h21:B_h0X ; load coef: h[2:1]:h[0:-1]
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|| SHR .S2X A_nr,2,B_j ; j_cnt = (nr+3)>>2
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LDNDW .D1T1 *A_x_ptr++,A_x76:A_x54 ; load input: x[7:6]:x[5:4]
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|| MPY .M2 B_j,B_nh,B_j
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|| ADD .L1X -4,B_nh,A_x_offset ; twin reg for h pointer
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LDNDW .D2T2 *-B_h_ptr(2),B_h65:B_h43 ; load coef: h[6:5]:h[4:3]
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|| ADD .S1X -8,B_nh,A_i ; j_cnt = (nh>>3)
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|| ZERO .L1 A_sum2:A_sum0
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|| MVK .D1 1,A_s ; flag for adding 1st sum
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LDNDW .D1T2 *A_x_ptr,B_xba:B_x98 ; load input: x[11:10]:x[9:8]
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|| MV .L2 B_nh,B_h_offset ; twin reg for h pointer
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|| SHR .S2 B_j,3,B_j ; j_cnt = (nh>>3)
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|| B .S1 dint0
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LDNDW .D2T1 *B_h_ptr++,A_h76:A_h54 ; load coef: h[7:6]:h[5:4]
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||[!A_i]SUBAH .D1 A_x_ptr,A_x_offset,A_x_ptr ; reset x_ptr
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|| ZERO .L2 B_sum3:B_sum1
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ADD .L2X 4,A_r_ptr,B_r_ptr ; nr + 3
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|| MVK .S1 1,A_i1 ; twin reg for h pointer
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; ========================== "JLOOP" LOOP KERNEL ========================== ;
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jloop:
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LDNDW .D1T2 *A_x_ptr++,B_x32:B_x10 ; load input: x[3:2]:x[1:0]
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||[!A_i]SUBAH .D2 B_h_ptr,B_h_offset,B_h_ptr ; reset h_ptr
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|| DOTP2 .M1X A_h32,B_x32,A_prod0_32 ; x[3]*h[3] + x[2]*h[2]
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|| DOTP2 .M2X B_h21,A_x54,B_prod3_21 ; x[5]*h[2] + x[4]*h[1]
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||[!A_s]ADD .L1 A_sum0,A_prod0_54,A_sum0 ; sum0 += A_prod0_54
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||[!A_s]ADD .L2 B_sum1,B_prod1_65,B_sum1 ; sum1 += B_prod1_65
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||[!A_s]ADD .S1 A_sum2,A_sum2a,A_sum2 ; sum2 += A_prod2_32,2_10
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||[!A_s]ADD .S2 B_sum3,B_sum3a,B_sum3 ; sum3 += B_prod3_43,3_21
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LDNDW .D2T1 *B_h_ptr++,A_h32:A_h10 ; load coef: h[3:2]:h[1:0]
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|| DOTP2 .M1 A_x54,A_h32,A_prod2_32 ; x[5]*h[3] + x[4]*h[2]
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|| DOTP2 .M2 B_x32,B_h21,B_prod1_21 ; x[3]*h[2] + x[2]*h[1]
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||[!A_s]ADD .L1 A_sum2,A_prod2_54,A_sum2 ; sum2 += A_prod2_54
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||[!A_s]ADD .L2 B_sum3,B_prod3_65,B_sum3 ; sum3 += B_prod3_65
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||[!A_i]MV .S1X B_nh,A_i ; j_cnt = nh
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|| MV .D1 A_i,A_i1 ; delayed i_cnt
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|| MV .S2X A_i1,B_i2 ; 2nd delayed i_cnt
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LDNDW .D2T2 *-B_h_ptr(10),B_h21:B_h0X ; load coef: h[2:1]:h[0:-1]
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|| DOTP2 .M1X A_h10,B_x10,A_prod0_10 ; x[1]*h[1] + x[0]*h[0]
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|| DOTP2 .M2X B_h43,A_x54,B_prod1_43 ; x[5]*h[4] + x[4]*h[3]
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||[!A_s]ADD .L1 A_sum0,A_prod0_76,A_sum0 ; sum0 += A_prod0_76
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||[!A_s]ADD .L2 B_sum1,B_prod1_07,B_sum1 ; sum1 += B_prod1_07
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|| SUB .D1 A_i,8,A_i ; i_cnt -=8
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||[ B_j]B .S1 jloop ; outer loop branch
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||[!B_j]RET .S2 B3 ; return to calling program
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dint0: DOTP2 .M1X A_h10,B_x32,A_prod2_10 ; x[3]*h[1] + x[2]*h[0]
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|| DOTP2 .M2X B_h43,A_x76,B_prod3_43 ; x[7]*h[4] + x[6]*h[3]
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||[ B_j]LDNDW .D1T1 *A_x_ptr++,A_x76:A_x54 ; load input: x[7:6]:x[5:4]
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||[!A_s]ADD .L1 A_sum2,A_prod2_76,A_sum2 ; sum2 += A_prod2_76
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||[!A_s]ADD .D2 B_sum3,B_prod3_07,B_sum3 ; sum3 += B_prod3_07
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|| SHR .S1 A_sum0,15,A_r0 ; r[0] = sum0 >>15
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|| PACKHL2 .L2 B_x32,B_xba,B_x3a ; input: x[4:3]
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|| PACKHL2 .S2 B_x10,B_x98,B_x18 ; input: x[6:5]
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[ B_j]LDNDW .D2T2 *-B_h_ptr(2),B_h65:B_h43 ; load coef: h[6:5]:h[4:3]
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|| DOTP2 .M1 A_x54,A_h54,A_prod0_54 ; x[5]*h[5] + x[4]*h[4]
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|| DOTP2 .M2X B_h65,A_x76,B_prod1_65 ; x[7]*h[6] + x[6]*h[5]
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|| SHR .S1X B_sum1,15,A_r1 ; r[1] = sum1 >>15
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|| ADD .L1 A_sum2,A_sum2,A_r2 ; r[2] = sum2 >>15
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|| ADD .S2 B_sum3,B_sum3,B_r3 ; r[3] = sum3 >>15
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||[ A_s]ZERO .D1 A_s ; start to add the sum
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||[!B_i2]ZERO .L2 B_sum3:B_sum1
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[ B_j]LDNDW .D1T2 *A_x_ptr,B_xba:B_x98 ; load input: x[11:10]:x[9:8]
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|| DOTP2 .M1 A_x76,A_h54,A_prod2_54 ; x[7]*h[5] + x[6]*h[4]
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|| DOTP2 .M2 B_x98,B_h65,B_prod3_65 ; x[9]*h[6] + x[8]*h[5]
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||[!B_i2]ZERO .L1 A_sum2:A_sum0
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|| PACKH2 .L2X B_h0X,A_h76,B_h07 ; coef: h[0:7]
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||[ B_j]SUB .D2 B_j,1,B_j ; j_cnt -=1
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||[ A_s]B .S2 dint0
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[ B_j]LDNDW .D2T1 *B_h_ptr++,A_h76:A_h54 ; load coef: h[7:6]:h[5:4]
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|| DOTP2 .M1 A_x76,A_h76,A_prod0_76 ; x[7]*h[7] + x[6]*h[6]
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|| DOTP2 .M2 B_x18,B_h07,B_prod1_07 ; x[1]*h[0] + x[8]*h[7]
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|| ADD .L1 A_prod0_10,A_prod0_32,A_sum0a ; sum0a = A_prod0_10+0_32
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|| ADD .L2 B_prod1_21,B_prod1_43,B_sum1a ; sum1a = B_prod1_21+1_43
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||[!A_i]SUBAH .D1 A_x_ptr,A_x_offset,A_x_ptr
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|| PACK2 .S1 A_r1,A_r0,A_r10 ; r[1:0]
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|| PACKH2 .S2X B_r3,A_r2,B_r32 ; r[3:2]
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[!B_i2]STW .D1T1 A_r10,*A_r_ptr++[2] ; store output r[1:0]
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||[!B_i2]STW .D2T2 B_r32,*B_r_ptr++[2] ; store output r[3:2]
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|| DOTP2 .M1X A_h76,B_x98,A_prod2_76 ; x[9]*h[7] + x[8]*h[6]
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|| DOTP2 .M2 B_x3a,B_h07,B_prod3_07 ; x[3]*h[0] + x[10]*h[7]
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|| ADD .L1 A_prod2_10,A_prod2_32,A_sum2a ; sum2a = A_prod2_10+2_32
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|| ADD .L2 B_prod3_21,B_prod3_43,B_sum3a ; sum3a = B_prod3_21+3_43
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|| ADD .S1 A_sum0,A_sum0a,A_sum0 ; sum0 += A_prod0_10,0_32
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|| ADD .S2 B_sum1,B_sum1a,B_sum1 ; sum1 += B_prod1_21,1_43
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; ============================ END OF "JLOOP" ============================= ;
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; ============================= BRANCH OCCURS ============================= ;
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* ========================================================================= *
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* End of file: dsp_fir_r8.asm *
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* ------------------------------------------------------------------------- *
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* Copyright (c) 2003 Texas Instruments, Incorporated. *
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* All Rights Reserved. *
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* ========================================================================= *
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