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177 lines
9.8 KiB
177 lines
9.8 KiB
;* ======================================================================== *;
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;* TEXAS INSTRUMENTS, INC. *;
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;* *;
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;* IMGLIB DSP Image/Video Processing Library *;
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;* *;
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;* Release: Revision 1.04b *;
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;* CVS Revision: 1.3 Fri Oct 25 00:29:08 2002 (UTC) *;
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;* Snapshot date: 23-Oct-2003 *;
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;* *;
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;* This library contains proprietary intellectual property of Texas *;
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;* Instruments, Inc. The library and its source code are protected by *;
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;* various copyrights, and portions may also be protected by patents or *;
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;* other legal protections. *;
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;* *;
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;* This software is licensed for use with Texas Instruments TMS320 *;
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;* family DSPs. This license was provided to you prior to installing *;
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;* the software. You may review this license by consulting the file *;
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;* TI_license.PDF which accompanies the files in this library. *;
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;* ------------------------------------------------------------------------ *;
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;* Copyright (C) 2003 Texas Instruments, Incorporated. *;
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;* All Rights Reserved. *;
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;* ======================================================================== *;
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;* ======================================================================== *;
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;* Assembler compatibility shim for assembling 4.30 and later code on *;
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;* tools prior to 4.30. *;
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;* ======================================================================== *;
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.if $isdefed(".ASSEMBLER_VERSION")
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.asg .ASSEMBLER_VERSION, $asmver
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.else
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.asg 0, $asmver
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.endif
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.if ($asmver < 430)
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.asg B, CALL ; Function Call
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.asg B, RET ; Return from a Function
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.asg B, CALLRET ; Function call with Call / Ret chaining.
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.if .TMS320C6400
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.asg BNOP, CALLNOP ; C64x BNOP as a Fn. Call
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.asg BNOP, RETNOP ; C64x BNOP as a Fn. Return
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.asg BNOP, CRNOP ; C64x Fn call w/, Call/Ret chaining via BNOP.
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.endif
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.asg , .asmfunc ; .func equivalent for hand-assembly code
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.asg , .endasmfunc ; .endfunc equivalent for hand-assembly code
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.endif
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;* ======================================================================== *;
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;* End of assembler compatibility shim. *;
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;* ======================================================================== *;
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* ========================================================================= *
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* NAME *
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* IMG_idct_8x8 -- Wrapper for idct_8x8_12q4, Little Endian. *
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* *
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* REVISION DATE *
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* 24-Oct-2002 *
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* *
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* USAGE *
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* This routine is C callable, and has the following C prototype: *
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* *
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* void IMG_idct_8x8(short idct_data[], unsigned num_idcts) *
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* *
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* DESCRIPTION *
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* This function provides a wrapper around the IMG_idct_8x8_12q4 *
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* function. It reads 12Q0 values in from the input array, and *
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* writes them back as 12Q4. Once all the values have been adjusted, *
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* the function then branches directly to IMG_idct_8x8_12q4. *
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* *
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* It is strongly recommended that you adapt your code to call *
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* IMG_idct_8x8_12q4 directly. Calling this wrapper adds an extra *
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* 16 cycles per block of processing overhead, as well as 116 *
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* bytes of additional code. *
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* *
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* ASSUMPTIONS *
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* This is a LITTLE ENDIAN implementation. *
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* The input array must be aligned on a double-word boundary. *
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* *
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* MEMORY NOTE *
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* No bank conflicts occur. *
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* *
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* NOTES *
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* This code locks out interrupts for its entire duration. *
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* It is, however, fully interrupt tolerant. *
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* *
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* CYCLES *
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* cycles = 16 + 16 * num_idcts, for num_idcts > 0 *
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* *
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* CODESIZE *
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* 116 bytes *
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* ------------------------------------------------------------------------- *
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* Copyright (c) 2003 Texas Instruments, Incorporated. *
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* All Rights Reserved. *
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* ========================================================================= *
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.global _IMG_idct_8x8_12q4
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.global _IMG_idct_8x8
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.sect ".text:_idct_wrap"
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.global _IMG_idct_8x8
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_IMG_idct_8x8:
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* ===================== SYMBOLIC REGISTER ASSIGNMENTS ===================== *
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.asg A5, A_ptr
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.asg B5, B_ptr
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.asg A1, A_i
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.asg B7, B_msk
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.asg B17, B_x76
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.asg B16, B_x54
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.asg A9, A_x32
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.asg A8, A_x10
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.asg B19, B_y76
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.asg B18, B_y54
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.asg A17, A_y32
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.asg A16, A_y10
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.asg B29, B_z76
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.asg B28, B_z54
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.asg A27, A_z32
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.asg A26, A_z10
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.asg B0, B_p
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.asg B20, B_idct_8x8_12q4
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* ========================================================================= *
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* =========================== PIPE LOOP PROLOG ============================ *
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MV A4, A_ptr
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|| ADD A4, 8, B_ptr
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B .S1 loop
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|| LDDW .D1T1 *A_ptr++[2],A_x32:A_x10 ;[ 1,1]
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|| LDDW .D2T2 *B_ptr++[2],B_x76:B_x54 ;[ 1,1]
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|| MVKL .S2 0xFFF0FFF0, B_msk
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MVKH .S2 0xFFF0FFF0, B_msk
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|| SHL .S1X B4, 3, A_i
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LDDW .D1T1 *A_ptr++[2],A_x32:A_x10 ;[ 1,2]
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|| LDDW .D2T2 *B_ptr++[2],B_x76:B_x54 ;[ 1,2]
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|| MVKL .S2 _IMG_idct_8x8_12q4, B_idct_8x8_12q4
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||[A_i] BDEC .S1 loop, A_i
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MVKH .S2 _IMG_idct_8x8_12q4, B_idct_8x8_12q4
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|| MVK .L2 2, B_p
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; ===== 2 prolog stages collapsed
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* =========================== PIPE LOOP KERNEL ============================ *
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loop:
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AND .L1X A_y32, B_msk, A_z32 ;[ 9,1]
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|| AND .L2 B_y76, B_msk, B_z76 ;[ 9,1]
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|| ROTL .M1 A_x32, 4, A_y32 ;[ 7,2]
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|| SHL .S2 B_x54, 4, B_y54 ;[ 7,2]
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||[ A_i]BDEC .S1 loop, A_i ;[ 5,3]
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|| LDDW .D1T1 *A_ptr++[2],A_x32:A_x10 ;[ 1,5]
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|| LDDW .D2T2 *B_ptr++[2],B_x76:B_x54 ;[ 1,5]
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[ B_p]SUB .L2 B_p, 1, B_p ;[10,1]
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||[!B_p]STDW .D1T1 A_z32:A_z10, *-A_ptr[10] ;[10,1]
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||[!B_p]STDW .D2T2 B_z76:B_z54, *-B_ptr[10] ;[10,1]
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|| AND .L1X A_y10, B_msk, A_z10 ;[ 8,2]
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|| AND .S2 B_y54, B_msk, B_z54 ;[ 8,2]
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|| SHL .S1 A_x10, 4, A_y10 ;[ 6,3]
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|| ROTL .M2 B_x76, 4, B_y76 ;[ 6,3]
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* ========================================================================= *
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; ===== epilog collapsed completely
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CRNOP .S2 B_idct_8x8_12q4, 5
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* ========================================================================= *
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* End of file: img_idct_8x8.asm *
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* ------------------------------------------------------------------------- *
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* Copyright (c) 2003 Texas Instruments, Incorporated. *
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* All Rights Reserved. *
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* ========================================================================= *
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