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181 lines
10 KiB
181 lines
10 KiB
;* ======================================================================== *;
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;* TEXAS INSTRUMENTS, INC. *;
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;* *;
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;* DSPLIB DSP Signal Processing Library *;
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;* *;
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;* Release: Revision 1.04b *;
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;* CVS Revision: 1.7 Sun Sep 29 03:32:25 2002 (UTC) *;
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;* Snapshot date: 23-Oct-2003 *;
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;* *;
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;* This library contains proprietary intellectual property of Texas *;
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;* Instruments, Inc. The library and its source code are protected by *;
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;* various copyrights, and portions may also be protected by patents or *;
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;* other legal protections. *;
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;* *;
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;* This software is licensed for use with Texas Instruments TMS320 *;
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;* family DSPs. This license was provided to you prior to installing *;
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;* the software. You may review this license by consulting the file *;
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;* TI_license.PDF which accompanies the files in this library. *;
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;* ------------------------------------------------------------------------ *;
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;* Copyright (C) 2003 Texas Instruments, Incorporated. *;
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;* All Rights Reserved. *;
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;* ======================================================================== *;
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;* ======================================================================== *;
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;* Assembler compatibility shim for assembling 4.30 and later code on *;
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;* tools prior to 4.30. *;
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;* ======================================================================== *;
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.if $isdefed(".ASSEMBLER_VERSION")
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.asg .ASSEMBLER_VERSION, $asmver
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.else
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.asg 0, $asmver
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.endif
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.if ($asmver < 430)
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.asg B, CALL ; Function Call
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.asg B, RET ; Return from a Function
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.asg B, CALLRET ; Function call with Call / Ret chaining.
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.if .TMS320C6400
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.asg BNOP, CALLNOP ; C64x BNOP as a Fn. Call
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.asg BNOP, RETNOP ; C64x BNOP as a Fn. Return
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.asg BNOP, CRNOP ; C64x Fn call w/, Call/Ret chaining via BNOP.
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.endif
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.asg , .asmfunc ; .func equivalent for hand-assembly code
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.asg , .endasmfunc ; .endfunc equivalent for hand-assembly code
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.endif
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;* ======================================================================== *;
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;* End of assembler compatibility shim. *;
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;* ======================================================================== *;
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* ========================================================================= *
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* *
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* *
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* TEXAS INSTRUMENTS, INC. *
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* *
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* NAME *
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* DSP_minval *
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* *
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* REVISION DATE *
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* 07-May-2001 *
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* *
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* USAGE *
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* This routine is C-callable and can be called as: *
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* *
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* short DSP_minval(const short *x, int nx); *
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* *
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* x = address to array of values *
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* nx = number of values in array *
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* *
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* *
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* DESCRIPTION *
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* This routine finds the minimum value of a vector and returns *
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* the value. *
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* *
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* short DSP_minval(const short *x, int nx) *
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* { *
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* int i, min; *
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* min = 32767; *
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* for (i = 0; i < nx; i++) *
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* if (x[i] < min) *
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* min = x[i]; *
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* return min; *
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* } *
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* *
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* ASSUMPTIONS *
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* Nx is a multiple of 4. *
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* Nx is greater than or equal to 20. *
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* *
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* MEMORY NOTE *
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* This code is ENDIAN NEUTRAL. *
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* *
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* NOTES *
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* This code is interrupt tolerant but not interruptible. *
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* *
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* CODESIZE *
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* 112 bytes *
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* *
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* CYCLES *
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* nx / 4 + 10 *
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* ------------------------------------------------------------------------- *
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* Copyright (c) 2003 Texas Instruments, Incorporated. *
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* All Rights Reserved. *
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* ========================================================================= *
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.sect ".text:_minval"
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.global _DSP_minval
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_DSP_minval:
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* ===================== SYMBOLIC REGISTER ASSIGNMENTS ===================== *
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.asg B4, B_nx
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.asg A4, A_x
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.asg A7, A_x_hi
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.asg A6, A_x_lo
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.asg A2, A_minA
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.asg B5, B_minB
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.asg B0, B_i
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.asg B1, B_x
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.asg B3, B_return
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.asg A4, A_minAc
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.asg A5, A_compareA
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.asg B7, B_compareB
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* =========================== PIPE LOOP PROLOG ============================ *
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LDNDW .D1T1 *A_x++, A_x_hi:A_x_lo ;[ 1,1] Load 4 elem
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|| B .S1 LOOP + 8 ;[ 2,2] Loop
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|| SHR .S2 B_nx, 2, B_i ;[ 3,0] nx/4
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LDNDW .D1T1 *A_x++, A_x_hi:A_x_lo ;[ 1,2] Load 4 elem
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|| B .S2 LOOP ;[ 2,2] Loop
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|| SUB .L2 B_i, 4, B_i ;[ 4,0] BDEC at 0
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|| MVKL .S1 0x7FFF7FFF, A_minA
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[ B_i]BDEC .S2 LOOP, B_i ;[ 2,2] Loop
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|| LDNDW .D1T1 *A_x++, A_x_hi:A_x_lo ;[ 1,3] Load 4 elem
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|| MVKH .S1 0x7FFF7FFF, A_minA
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[ B_i]BDEC .S2 LOOP, B_i ;[ 2,3] Loop
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|| LDNDW .D1T1 *A_x++, A_x_hi:A_x_lo ;[ 1,4] Load 4 elem
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[ B_i]BDEC .S2 LOOP, B_i ;[ 2,4] Loop
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|| LDNDW .D1T1 *A_x++, A_x_hi:A_x_lo ;[ 1,5] Load 4 elem
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|| MV .L2X A_minA, B_minB ;[ 4,0] Part. copy
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* =========================== PIPE LOOP KERNEL ============================ *
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LOOP:
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MIN2 .L1 A_x_hi, A_minA, A_minA ;[ 6,2] update min
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|| MIN2 .L2X A_x_lo, B_minB, B_minB ;[ 6,2] update min
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||[ B_i]BDEC .S2 LOOP, B_i ;[ 2,6] Loop
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|| LDNDW .D1T1 *A_x++, A_x_hi:A_x_lo ;[ 1,7] Load 4 elem
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* =========================== PIPE LOOP EPILOG ============================ *
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MIN2 .L1 A_x_hi, A_minA, A_minA ;[ 6,6] update min
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|| MIN2 .L2X A_x_lo, B_minB, B_minB ;[ 6,6] update min
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|| RET .S2 B_return ;
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SWAP2 .L2 B_minB, B_compareB ;[ 2,0]
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|| SWAP2 .S1 A_minA, A_compareA ;[ 3,0]
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MIN2 .L2 B_minB, B_compareB, B_minB ;[ 3,0] update min
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MIN2 .L1 A_minA, A_compareA, A_minA ;[ 4,0] update min
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MIN2 .L1X A_minA, B_minB, A_minA ;[ 5,0] final min
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EXT .S1 A_minA, 16, 16, A_minAc ;[ 6,0]
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;==== Branch occurs
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* ========================================================================= *
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* End of file: dsp_minval.asm *
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* ------------------------------------------------------------------------- *
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* Copyright (c) 2003 Texas Instruments, Incorporated. *
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* All Rights Reserved. *
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* ========================================================================= *
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