From 54fb8d89b264229e3d9e4fdd95b3bf1296641e39 Mon Sep 17 00:00:00 2001 From: Jonathan Oakley Date: Mon, 9 Sep 2024 08:18:25 +0100 Subject: [PATCH] Fix issue with use on Teensy 3.x Code to enable writes to ITCM only applies to T4.x, so guarded with #if --- library.properties | 2 +- src/TeensyDebug.cpp | 6 ++++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/library.properties b/library.properties index 857db75..fda1afc 100644 --- a/library.properties +++ b/library.properties @@ -1,5 +1,5 @@ name=TeensyDebug -version=0.0.3 +version=0.0.4 author=Fernando Trias maintainer=Fernando Trias sentence=Debugging using GDB on PJRC Teensy. diff --git a/src/TeensyDebug.cpp b/src/TeensyDebug.cpp index 33d541a..07e2942 100644 --- a/src/TeensyDebug.cpp +++ b/src/TeensyDebug.cpp @@ -365,7 +365,7 @@ int debug_isBreakpoint(void *p) { } /* - * Breakpint handlers + * Breakpoint handlers * * During a breakpoint: * 1. The interrupt is initiated and registers are saved. @@ -1179,7 +1179,8 @@ void debug_init() { // dumpmem(xtable, 32); #endif - // Recent startup.c has disabled writes to ITCM - re-enable those +#if defined(__IMXRT1062__) // doesn't apply to Teensy 3.x + // Recent teensy4/startup.c has disabled writes to ITCM - re-enable those // Various macros cribbed from there... #define READWRITE SCB_MPU_RASR_AP(3) #define MEM_NOCACHE SCB_MPU_RASR_TEX(1) @@ -1187,6 +1188,7 @@ void debug_init() { #define REGION(n) (SCB_MPU_RBAR_REGION(n) | SCB_MPU_RBAR_VALID) SCB_MPU_RBAR = 0x00000000 | REGION(1); // *** assumed *** ITCM SCB_MPU_RASR = MEM_NOCACHE | READWRITE | SIZE_512K; +#endif // defined(__IMXRT1062__) debug_trace = 1;