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/*
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* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/*******************************************************************************
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* This is the Secure Payload Dispatcher (SPD). The dispatcher is meant to be a
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* plug-in component to the Secure Monitor, registered as a runtime service. The
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* SPD is expected to be a functional extension of the Secure Payload (SP) that
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* executes in Secure EL1. The Secure Monitor will delegate all SMCs targeting
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* the Trusted OS/Applications range to the dispatcher. The SPD will either
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* handle the request locally or delegate it to the Secure Payload. It is also
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* responsible for initialising and maintaining communication with the SP.
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******************************************************************************/
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#include <assert.h>
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#include <errno.h>
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#include <stddef.h>
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#include <arch_helpers.h>
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#include <bl31/bl31.h>
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#include <common/bl_common.h>
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#include <common/debug.h>
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#include <common/runtime_svc.h>
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#include <lib/el3_runtime/context_mgmt.h>
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#include <plat/common/platform.h>
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#include <tools_share/uuid.h>
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#include "opteed_private.h"
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#include "teesmc_opteed.h"
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#include "teesmc_opteed_macros.h"
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/*******************************************************************************
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* Address of the entrypoint vector table in OPTEE. It is
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* initialised once on the primary core after a cold boot.
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******************************************************************************/
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struct optee_vectors *optee_vector_table;
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/*******************************************************************************
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* Array to keep track of per-cpu OPTEE state
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******************************************************************************/
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optee_context_t opteed_sp_context[OPTEED_CORE_COUNT];
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uint32_t opteed_rw;
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static int32_t opteed_init(void);
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/*******************************************************************************
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* This function is the handler registered for S-EL1 interrupts by the
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* OPTEED. It validates the interrupt and upon success arranges entry into
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* the OPTEE at 'optee_fiq_entry()' for handling the interrupt.
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******************************************************************************/
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static uint64_t opteed_sel1_interrupt_handler(uint32_t id,
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uint32_t flags,
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void *handle,
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void *cookie)
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{
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uint32_t linear_id;
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optee_context_t *optee_ctx;
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/* Check the security state when the exception was generated */
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assert(get_interrupt_src_ss(flags) == NON_SECURE);
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/* Sanity check the pointer to this cpu's context */
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assert(handle == cm_get_context(NON_SECURE));
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/* Save the non-secure context before entering the OPTEE */
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cm_el1_sysregs_context_save(NON_SECURE);
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/* Get a reference to this cpu's OPTEE context */
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linear_id = plat_my_core_pos();
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optee_ctx = &opteed_sp_context[linear_id];
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assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE));
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cm_set_elr_el3(SECURE, (uint64_t)&optee_vector_table->fiq_entry);
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cm_el1_sysregs_context_restore(SECURE);
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cm_set_next_eret_context(SECURE);
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/*
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* Tell the OPTEE that it has to handle an FIQ (synchronously).
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* Also the instruction in normal world where the interrupt was
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* generated is passed for debugging purposes. It is safe to
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* retrieve this address from ELR_EL3 as the secure context will
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* not take effect until el3_exit().
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*/
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SMC_RET1(&optee_ctx->cpu_ctx, read_elr_el3());
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}
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/*******************************************************************************
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* OPTEE Dispatcher setup. The OPTEED finds out the OPTEE entrypoint and type
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* (aarch32/aarch64) if not already known and initialises the context for entry
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* into OPTEE for its initialization.
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******************************************************************************/
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static int32_t opteed_setup(void)
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{
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entry_point_info_t *optee_ep_info;
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uint32_t linear_id;
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uint64_t opteed_pageable_part;
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uint64_t opteed_mem_limit;
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uint64_t dt_addr;
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linear_id = plat_my_core_pos();
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/*
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* Get information about the Secure Payload (BL32) image. Its
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* absence is a critical failure. TODO: Add support to
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* conditionally include the SPD service
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*/
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optee_ep_info = bl31_plat_get_next_image_ep_info(SECURE);
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if (!optee_ep_info) {
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WARN("No OPTEE provided by BL2 boot loader, Booting device"
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" without OPTEE initialization. SMC`s destined for OPTEE"
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" will return SMC_UNK\n");
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return 1;
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}
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/*
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* If there's no valid entry point for SP, we return a non-zero value
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* signalling failure initializing the service. We bail out without
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* registering any handlers
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*/
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if (!optee_ep_info->pc)
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return 1;
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opteed_rw = optee_ep_info->args.arg0;
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opteed_pageable_part = optee_ep_info->args.arg1;
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opteed_mem_limit = optee_ep_info->args.arg2;
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dt_addr = optee_ep_info->args.arg3;
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opteed_init_optee_ep_state(optee_ep_info,
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opteed_rw,
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optee_ep_info->pc,
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opteed_pageable_part,
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opteed_mem_limit,
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dt_addr,
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&opteed_sp_context[linear_id]);
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/*
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* All OPTEED initialization done. Now register our init function with
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* BL31 for deferred invocation
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*/
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bl31_register_bl32_init(&opteed_init);
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return 0;
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}
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/*******************************************************************************
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* This function passes control to the OPTEE image (BL32) for the first time
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* on the primary cpu after a cold boot. It assumes that a valid secure
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* context has already been created by opteed_setup() which can be directly
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* used. It also assumes that a valid non-secure context has been
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* initialised by PSCI so it does not need to save and restore any
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* non-secure state. This function performs a synchronous entry into
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* OPTEE. OPTEE passes control back to this routine through a SMC.
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******************************************************************************/
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static int32_t opteed_init(void)
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{
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uint32_t linear_id = plat_my_core_pos();
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optee_context_t *optee_ctx = &opteed_sp_context[linear_id];
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entry_point_info_t *optee_entry_point;
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uint64_t rc;
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/*
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* Get information about the OPTEE (BL32) image. Its
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* absence is a critical failure.
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*/
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optee_entry_point = bl31_plat_get_next_image_ep_info(SECURE);
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assert(optee_entry_point);
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cm_init_my_context(optee_entry_point);
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/*
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* Arrange for an entry into OPTEE. It will be returned via
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* OPTEE_ENTRY_DONE case
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*/
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rc = opteed_synchronous_sp_entry(optee_ctx);
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assert(rc != 0);
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return rc;
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}
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/*******************************************************************************
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* This function is responsible for handling all SMCs in the Trusted OS/App
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* range from the non-secure state as defined in the SMC Calling Convention
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* Document. It is also responsible for communicating with the Secure
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* payload to delegate work and return results back to the non-secure
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* state. Lastly it will also return any information that OPTEE needs to do
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* the work assigned to it.
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******************************************************************************/
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static uintptr_t opteed_smc_handler(uint32_t smc_fid,
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u_register_t x1,
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u_register_t x2,
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u_register_t x3,
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u_register_t x4,
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void *cookie,
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void *handle,
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u_register_t flags)
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{
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cpu_context_t *ns_cpu_context;
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uint32_t linear_id = plat_my_core_pos();
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optee_context_t *optee_ctx = &opteed_sp_context[linear_id];
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uint64_t rc;
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/*
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* Determine which security state this SMC originated from
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*/
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if (is_caller_non_secure(flags)) {
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/*
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* This is a fresh request from the non-secure client.
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* The parameters are in x1 and x2. Figure out which
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* registers need to be preserved, save the non-secure
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* state and send the request to the secure payload.
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*/
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assert(handle == cm_get_context(NON_SECURE));
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cm_el1_sysregs_context_save(NON_SECURE);
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/*
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* We are done stashing the non-secure context. Ask the
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* OPTEE to do the work now.
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*/
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/*
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* Verify if there is a valid context to use, copy the
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* operation type and parameters to the secure context
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* and jump to the fast smc entry point in the secure
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* payload. Entry into S-EL1 will take place upon exit
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* from this function.
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*/
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assert(&optee_ctx->cpu_ctx == cm_get_context(SECURE));
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/* Set appropriate entry for SMC.
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* We expect OPTEE to manage the PSTATE.I and PSTATE.F
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* flags as appropriate.
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*/
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if (GET_SMC_TYPE(smc_fid) == SMC_TYPE_FAST) {
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cm_set_elr_el3(SECURE, (uint64_t)
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&optee_vector_table->fast_smc_entry);
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} else {
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cm_set_elr_el3(SECURE, (uint64_t)
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&optee_vector_table->yield_smc_entry);
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}
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cm_el1_sysregs_context_restore(SECURE);
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cm_set_next_eret_context(SECURE);
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write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx),
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CTX_GPREG_X4,
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read_ctx_reg(get_gpregs_ctx(handle),
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CTX_GPREG_X4));
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write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx),
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CTX_GPREG_X5,
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read_ctx_reg(get_gpregs_ctx(handle),
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CTX_GPREG_X5));
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write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx),
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CTX_GPREG_X6,
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read_ctx_reg(get_gpregs_ctx(handle),
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CTX_GPREG_X6));
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/* Propagate hypervisor client ID */
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write_ctx_reg(get_gpregs_ctx(&optee_ctx->cpu_ctx),
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CTX_GPREG_X7,
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read_ctx_reg(get_gpregs_ctx(handle),
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CTX_GPREG_X7));
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SMC_RET4(&optee_ctx->cpu_ctx, smc_fid, x1, x2, x3);
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}
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/*
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* Returning from OPTEE
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*/
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switch (smc_fid) {
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/*
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* OPTEE has finished initialising itself after a cold boot
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*/
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case TEESMC_OPTEED_RETURN_ENTRY_DONE:
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/*
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* Stash the OPTEE entry points information. This is done
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* only once on the primary cpu
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*/
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assert(optee_vector_table == NULL);
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optee_vector_table = (optee_vectors_t *) x1;
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if (optee_vector_table) {
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set_optee_pstate(optee_ctx->state, OPTEE_PSTATE_ON);
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/*
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* OPTEE has been successfully initialized.
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* Register power management hooks with PSCI
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*/
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psci_register_spd_pm_hook(&opteed_pm);
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/*
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* Register an interrupt handler for S-EL1 interrupts
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* when generated during code executing in the
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* non-secure state.
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*/
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flags = 0;
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set_interrupt_rm_flag(flags, NON_SECURE);
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rc = register_interrupt_type_handler(INTR_TYPE_S_EL1,
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opteed_sel1_interrupt_handler,
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flags);
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if (rc)
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panic();
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}
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/*
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* OPTEE reports completion. The OPTEED must have initiated
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* the original request through a synchronous entry into
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* OPTEE. Jump back to the original C runtime context.
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*/
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opteed_synchronous_sp_exit(optee_ctx, x1);
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break;
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/*
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* These function IDs is used only by OP-TEE to indicate it has
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* finished:
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* 1. turning itself on in response to an earlier psci
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* cpu_on request
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* 2. resuming itself after an earlier psci cpu_suspend
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* request.
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*/
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case TEESMC_OPTEED_RETURN_ON_DONE:
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case TEESMC_OPTEED_RETURN_RESUME_DONE:
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/*
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* These function IDs is used only by the SP to indicate it has
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* finished:
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* 1. suspending itself after an earlier psci cpu_suspend
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* request.
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* 2. turning itself off in response to an earlier psci
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* cpu_off request.
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*/
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case TEESMC_OPTEED_RETURN_OFF_DONE:
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case TEESMC_OPTEED_RETURN_SUSPEND_DONE:
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case TEESMC_OPTEED_RETURN_SYSTEM_OFF_DONE:
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case TEESMC_OPTEED_RETURN_SYSTEM_RESET_DONE:
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/*
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* OPTEE reports completion. The OPTEED must have initiated the
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* original request through a synchronous entry into OPTEE.
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* Jump back to the original C runtime context, and pass x1 as
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* return value to the caller
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*/
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opteed_synchronous_sp_exit(optee_ctx, x1);
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break;
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/*
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* OPTEE is returning from a call or being preempted from a call, in
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* either case execution should resume in the normal world.
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*/
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case TEESMC_OPTEED_RETURN_CALL_DONE:
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/*
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* This is the result from the secure client of an
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* earlier request. The results are in x0-x3. Copy it
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* into the non-secure context, save the secure state
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* and return to the non-secure state.
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*/
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assert(handle == cm_get_context(SECURE));
|
|
|
|
cm_el1_sysregs_context_save(SECURE);
|
|
|
|
|
|
|
|
/* Get a reference to the non-secure context */
|
|
|
|
ns_cpu_context = cm_get_context(NON_SECURE);
|
|
|
|
assert(ns_cpu_context);
|
|
|
|
|
|
|
|
/* Restore non-secure state */
|
|
|
|
cm_el1_sysregs_context_restore(NON_SECURE);
|
|
|
|
cm_set_next_eret_context(NON_SECURE);
|
|
|
|
|
|
|
|
SMC_RET4(ns_cpu_context, x1, x2, x3, x4);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* OPTEE has finished handling a S-EL1 FIQ interrupt. Execution
|
|
|
|
* should resume in the normal world.
|
|
|
|
*/
|
|
|
|
case TEESMC_OPTEED_RETURN_FIQ_DONE:
|
|
|
|
/* Get a reference to the non-secure context */
|
|
|
|
ns_cpu_context = cm_get_context(NON_SECURE);
|
|
|
|
assert(ns_cpu_context);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Restore non-secure state. There is no need to save the
|
|
|
|
* secure system register context since OPTEE was supposed
|
|
|
|
* to preserve it during S-EL1 interrupt handling.
|
|
|
|
*/
|
|
|
|
cm_el1_sysregs_context_restore(NON_SECURE);
|
|
|
|
cm_set_next_eret_context(NON_SECURE);
|
|
|
|
|
|
|
|
SMC_RET0((uint64_t) ns_cpu_context);
|
|
|
|
|
|
|
|
default:
|
|
|
|
panic();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Define an OPTEED runtime service descriptor for fast SMC calls */
|
|
|
|
DECLARE_RT_SVC(
|
|
|
|
opteed_fast,
|
|
|
|
|
|
|
|
OEN_TOS_START,
|
|
|
|
OEN_TOS_END,
|
|
|
|
SMC_TYPE_FAST,
|
|
|
|
opteed_setup,
|
|
|
|
opteed_smc_handler
|
|
|
|
);
|
|
|
|
|
|
|
|
/* Define an OPTEED runtime service descriptor for yielding SMC calls */
|
|
|
|
DECLARE_RT_SVC(
|
|
|
|
opteed_std,
|
|
|
|
|
|
|
|
OEN_TOS_START,
|
|
|
|
OEN_TOS_END,
|
|
|
|
SMC_TYPE_YIELD,
|
|
|
|
NULL,
|
|
|
|
opteed_smc_handler
|
|
|
|
);
|