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arm-trusted-firmware/fdts/stm32mp157c-odyssey-som.dtsi

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fdts: stm32mp1: add support for the Seeed Odyssey SoM and board Seeed Studio’s SoM‐STM32MP157C is a System‐on‐Module that integrates the STM32MP157C MPU (the 650 MHz dual‐core variant with a GPU and a cryptographic processor) the STPMIC1A PMIC, 512 MB of DDR3 RAM and a 4 GB eMMC. There are two LEDs as well, one hardwired to the PMIC’s VDD output, and the other available at the MPU’s port PG3. The SoM can be plugged into a carrier board using its three 70‑pin connectors. Seeed Odyssey‐STM32MP157C is the reference carrier board for the SoM in a Raspberry Pi‐like form factor. It features a WiFi/Bluetooth chip, a microSD card port and various I/O interfaces. The device tree is based on the DKx boards. TF‑A was successfully tested on the board with Buildroot 2021.02 and U-Boot 2021.04. Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl> Change-Id: I2c9aecc925561e8d338dddbb192d3bb23a533914
4 years ago
/*
refactor(st): use dashes for BSEC node names This is something commonly asked by Linux kernel DT maintainers [1]. The mentioned doc is not upstreamed, but may be checked with dtbs_check. While at it align some nodes with Linux or OP-TEE. [1] https://lore.kernel.org/linux-arm-kernel/20231125184422.12315-1-krzysztof.kozlowski@linaro.org/ Change-Id: I63e983c2a00eda3cd8b81c66c0cd1a97cf8249b7 Signed-off-by: Yann Gautier <yann.gautier@st.com>
10 months ago
* Copyright (C) 2019-2024, STMicroelectronics. All Rights Reserved.
fdts: stm32mp1: add support for the Seeed Odyssey SoM and board Seeed Studio’s SoM‐STM32MP157C is a System‐on‐Module that integrates the STM32MP157C MPU (the 650 MHz dual‐core variant with a GPU and a cryptographic processor) the STPMIC1A PMIC, 512 MB of DDR3 RAM and a 4 GB eMMC. There are two LEDs as well, one hardwired to the PMIC’s VDD output, and the other available at the MPU’s port PG3. The SoM can be plugged into a carrier board using its three 70‑pin connectors. Seeed Odyssey‐STM32MP157C is the reference carrier board for the SoM in a Raspberry Pi‐like form factor. It features a WiFi/Bluetooth chip, a microSD card port and various I/O interfaces. The device tree is based on the DKx boards. TF‑A was successfully tested on the board with Buildroot 2021.02 and U-Boot 2021.04. Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl> Change-Id: I2c9aecc925561e8d338dddbb192d3bb23a533914
4 years ago
* Copyright (C) 2021, Grzegorz Szymaszek.
*
* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
*/
#include "stm32mp157.dtsi"
#include "stm32mp15xc.dtsi"
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxac-pinctrl.dtsi"
#include <dt-bindings/clock/stm32mp1-clksrc.h>
#include "stm32mp15-ddr3-1x4Gb-1066-binG.dtsi"
/ {
memory@c0000000 {
device_type = "memory";
reg = <0xc0000000 0x20000000>;
};
vin: vin {
compatible = "regulator-fixed";
regulator-name = "vin";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
};
&bsec {
refactor(st): use dashes for BSEC node names This is something commonly asked by Linux kernel DT maintainers [1]. The mentioned doc is not upstreamed, but may be checked with dtbs_check. While at it align some nodes with Linux or OP-TEE. [1] https://lore.kernel.org/linux-arm-kernel/20231125184422.12315-1-krzysztof.kozlowski@linaro.org/ Change-Id: I63e983c2a00eda3cd8b81c66c0cd1a97cf8249b7 Signed-off-by: Yann Gautier &lt;yann.gautier@st.com&gt;
10 months ago
board_id: board-id@ec {
fdts: stm32mp1: add support for the Seeed Odyssey SoM and board Seeed Studio’s SoM‐STM32MP157C is a System‐on‐Module that integrates the STM32MP157C MPU (the 650 MHz dual‐core variant with a GPU and a cryptographic processor) the STPMIC1A PMIC, 512 MB of DDR3 RAM and a 4 GB eMMC. There are two LEDs as well, one hardwired to the PMIC’s VDD output, and the other available at the MPU’s port PG3. The SoM can be plugged into a carrier board using its three 70‑pin connectors. Seeed Odyssey‐STM32MP157C is the reference carrier board for the SoM in a Raspberry Pi‐like form factor. It features a WiFi/Bluetooth chip, a microSD card port and various I/O interfaces. The device tree is based on the DKx boards. TF‑A was successfully tested on the board with Buildroot 2021.02 and U-Boot 2021.04. Signed-off-by: Grzegorz Szymaszek &lt;gszymaszek@short.pl&gt; Change-Id: I2c9aecc925561e8d338dddbb192d3bb23a533914
4 years ago
reg = <0xec 0x4>;
st,non-secure-otp;
};
};
&clk_hse {
st,digbypass;
};
&cpu0 {
cpu-supply = <&vddcore>;
};
&cpu1 {
cpu-supply = <&vddcore>;
};
&cryp1 {
status = "okay";
};
&hash1 {
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins_a>;
clock-frequency = <400000>;
i2c-scl-rising-time-ns = <185>;
i2c-scl-falling-time-ns = <20>;
status = "okay";
pmic: stpmic@33 {
compatible = "st,stpmic1";
reg = <0x33>;
interrupts-extended = <&exti_pwr 55 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
status = "okay";
regulators {
compatible = "st,stpmic1-regulators";
buck1-supply = <&vin>;
buck2-supply = <&vin>;
buck3-supply = <&vin>;
buck4-supply = <&vin>;
ldo1-supply = <&v3v3>;
ldo2-supply = <&vin>;
ldo3-supply = <&vdd_ddr>;
ldo4-supply = <&vin>;
ldo5-supply = <&vin>;
ldo6-supply = <&v3v3>;
vref_ddr-supply = <&vin>;
boost-supply = <&vin>;
pwr_sw1-supply = <&bst_out>;
pwr_sw2-supply = <&bst_out>;
vddcore: buck1 {
regulator-name = "vddcore";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-initial-mode = <0>;
regulator-over-current-protection;
};
vdd_ddr: buck2 {
regulator-name = "vdd_ddr";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-initial-mode = <0>;
regulator-over-current-protection;
};
vdd: buck3 {
regulator-name = "vdd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
st,mask-reset;
regulator-initial-mode = <0>;
regulator-over-current-protection;
};
v3v3: buck4 {
regulator-name = "v3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-over-current-protection;
regulator-initial-mode = <0>;
};
v1v8_audio: ldo1 {
regulator-name = "v1v8_audio";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
v3v3_hdmi: ldo2 {
regulator-name = "v3v3_hdmi";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vtt_ddr: ldo3 {
regulator-name = "vtt_ddr";
regulator-always-on;
regulator-over-current-protection;
fix(stm32mp1): fdts: stm32mp1: align DDR regulators with new driver With recent changes, TF-A now panics on MC-1, Avenger96 and Odyssey: NOTICE: CPU: STM32MP157C?? Rev.B NOTICE: Model: Linux Automation MC-1 board ERROR: regul ldo3: max value 750 is invalid PANIC at PC : 0x2ffeebb7 as the driver takes great offense at the content of the device tree. The parts in question were copy-pasted from ST DTs, but those ST DTs were fixed by commit 67d95409baae (&#34;refactor(stm32mp1-fdts): update regulator description&#34;). Fix the breakage by transplanting the same changes into all remaining STM32MP1 DTs. Change was boot-tested on MC-1, but only build tested for the other two. Fixes: bba9fdee589f (&#34;feat(stm32mp1): add regulator framework compilation&#34;) Signed-off-by: Ahmad Fatoum &lt;a.fatoum@pengutronix.de&gt; Change-Id: I143d0091625f62c313b3b71449c9ad99583d01c8
2 years ago
st,regulator-sink-source;
fdts: stm32mp1: add support for the Seeed Odyssey SoM and board Seeed Studio’s SoM‐STM32MP157C is a System‐on‐Module that integrates the STM32MP157C MPU (the 650 MHz dual‐core variant with a GPU and a cryptographic processor) the STPMIC1A PMIC, 512 MB of DDR3 RAM and a 4 GB eMMC. There are two LEDs as well, one hardwired to the PMIC’s VDD output, and the other available at the MPU’s port PG3. The SoM can be plugged into a carrier board using its three 70‑pin connectors. Seeed Odyssey‐STM32MP157C is the reference carrier board for the SoM in a Raspberry Pi‐like form factor. It features a WiFi/Bluetooth chip, a microSD card port and various I/O interfaces. The device tree is based on the DKx boards. TF‑A was successfully tested on the board with Buildroot 2021.02 and U-Boot 2021.04. Signed-off-by: Grzegorz Szymaszek &lt;gszymaszek@short.pl&gt; Change-Id: I2c9aecc925561e8d338dddbb192d3bb23a533914
4 years ago
};
vdd_usb: ldo4 {
regulator-name = "vdd_usb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdda: ldo5 {
regulator-name = "vdda";
regulator-min-microvolt = <2900000>;
regulator-max-microvolt = <2900000>;
regulator-boot-on;
};
v1v2_hdmi: ldo6 {
regulator-name = "v1v2_hdmi";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
vref_ddr: vref_ddr {
regulator-name = "vref_ddr";
regulator-always-on;
};
bst_out: boost {
regulator-name = "bst_out";
};
vbus_otg: pwr_sw1 {
regulator-name = "vbus_otg";
};
vbus_sw: pwr_sw2 {
regulator-name = "vbus_sw";
regulator-active-discharge = <1>;
};
};
pmic_watchdog: watchdog {
compatible = "st,stpmic1-wdt";
status = "disabled";
};
};
};
&iwdg2 {
timeout-sec = <32>;
status = "okay";
};
&pwr_regulators {
vdd-supply = <&vdd>;
vdd_3v3_usbfs-supply = <&vdd_usb>;
};
&rcc {
st,clksrc = <
CLK_MPU_PLL1P
CLK_AXI_PLL2P
CLK_MCU_PLL3P
CLK_PLL12_HSE
CLK_PLL3_HSE
CLK_PLL4_HSE
CLK_RTC_LSE
CLK_MCO1_DISABLED
CLK_MCO2_DISABLED
>;
st,clkdiv = <
1 /*MPU*/
0 /*AXI*/
0 /*MCU*/
1 /*APB1*/
1 /*APB2*/
1 /*APB3*/
1 /*APB4*/
2 /*APB5*/
23 /*RTC*/
0 /*MCO1*/
0 /*MCO2*/
>;
st,pkcs = <
CLK_CKPER_HSE
CLK_FMC_ACLK
CLK_QSPI_ACLK
CLK_ETH_PLL4P
CLK_SDMMC12_PLL4P
CLK_DSI_DSIPLL
CLK_STGEN_HSE
CLK_USBPHY_HSE
CLK_SPI2S1_PLL3Q
CLK_SPI2S23_PLL3Q
CLK_SPI45_HSI
CLK_SPI6_HSI
CLK_I2C46_HSI
CLK_SDMMC3_PLL4P
CLK_USBO_USBPHY
CLK_ADC_CKPER
CLK_CEC_LSE
CLK_I2C12_HSI
CLK_I2C35_HSI
CLK_UART1_HSI
CLK_UART24_HSI
CLK_UART35_HSI
CLK_UART6_HSI
CLK_UART78_HSI
CLK_SPDIF_PLL4P
CLK_FDCAN_PLL4R
CLK_SAI1_PLL3Q
CLK_SAI2_PLL3Q
CLK_SAI3_PLL3Q
CLK_SAI4_PLL3Q
CLK_RNG1_LSI
CLK_RNG2_LSI
CLK_LPTIM1_PCLK1
CLK_LPTIM23_PCLK3
CLK_LPTIM45_LSE
>;
/* VCO = 1300.0 MHz => P = 650 (CPU) */
pll1: st,pll@0 {
compatible = "st,stm32mp1-pll";
reg = <0>;
cfg = <2 80 0 0 0 PQR(1,0,0)>;
frac = <0x800>;
};
/* VCO = 1066.0 MHz => P = 266 (AXI), Q = 533 (GPU), R = 533 (DDR) */
pll2: st,pll@1 {
compatible = "st,stm32mp1-pll";
reg = <1>;
cfg = <2 65 1 0 0 PQR(1,1,1)>;
frac = <0x1400>;
};
/* VCO = 417.8 MHz => P = 209, Q = 24, R = 11 */
pll3: st,pll@2 {
compatible = "st,stm32mp1-pll";
reg = <2>;
cfg = <1 33 1 16 36 PQR(1,1,1)>;
frac = <0x1a04>;
};
/* VCO = 594.0 MHz => P = 99, Q = 74, R = 74 */
pll4: st,pll@3 {
compatible = "st,stm32mp1-pll";
reg = <3>;
cfg = <3 98 5 7 7 PQR(1,1,1)>;
};
};
&rng1 {
status = "okay";
};
&rtc {
status = "okay";
};
&sdmmc2 {
pinctrl-names = "default";
pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_d>;
non-removable;
no-sd;
no-sdio;
st,neg-edge;
bus-width = <8>;
vmmc-supply = <&v3v3>;
vqmmc-supply = <&vdd>;
mmc-ddr-3_3v;
status = "okay";
};