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arm-trusted-firmware/plat/xilinx/versal/plat_topology.c

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arm64: versal: Add support for new Xilinx Versal ACAPs Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. This patch adds Virtual QEMU platform support for this SoC "versal_virt". Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years ago
/*
style(xilinx): replace ARM by Arm in copyrights The commit 6bb49c876c75 ("style(hooks): adds Arm copyright style fix") is enforcing proper case for ARM. That's why fix it in plat/xilinx to make sure that pre-commit.copyright won't be touching platform specific files. Change-Id: I49c66e18d46ed871a6aa128c9b2a403d0cf83416 Signed-off-by: Michal Simek <michal.simek@amd.com>
2 years ago
* Copyright (c) 2018, Arm Limited and Contributors. All rights reserved.
arm64: versal: Add support for new Xilinx Versal ACAPs Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. This patch adds Virtual QEMU platform support for this SoC "versal_virt". Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
6 years ago
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <platform_def.h>
fix(versal): resolve the misra 4.6 warnings MISRA Violation: MISRA-C:2012 R.4.6 - Using basic numerical type int rather than a typedef that includes size and signedness information. Signed-off-by: Venkatesh Yadav Abbarapu &lt;venkatesh.abbarapu@xilinx.com&gt; Change-Id: I4eccce7e238f283348a5013e2e45c91435b4ae4e
2 years ago
static const uint8_t plat_power_domain_tree_desc[] = {1, PLATFORM_CORE_COUNT};
arm64: versal: Add support for new Xilinx Versal ACAPs Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. This patch adds Virtual QEMU platform support for this SoC &#34;versal_virt&#34;. Signed-off-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt; Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
6 years ago
fix(versal): resolve the misra 4.6 warnings MISRA Violation: MISRA-C:2012 R.4.6 - Using basic numerical type int rather than a typedef that includes size and signedness information. Signed-off-by: Venkatesh Yadav Abbarapu &lt;venkatesh.abbarapu@xilinx.com&gt; Change-Id: I4eccce7e238f283348a5013e2e45c91435b4ae4e
2 years ago
const uint8_t *plat_get_power_domain_tree_desc(void)
arm64: versal: Add support for new Xilinx Versal ACAPs Xilinx is introducing Versal, an adaptive compute acceleration platform (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with leading-edge memory and interfacing technologies to deliver powerful heterogeneous acceleration for any application. The Versal AI Core series has five devices, offering 128 to 400 AI Engines. The series includes dual-core Arm Cortex-A72 application processors, dual-core Arm Cortex-R5 real-time processors, 256KB of on-chip memory with ECC, more than 1,900 DSP engines optimized for high-precision floating point with low latency. This patch adds Virtual QEMU platform support for this SoC &#34;versal_virt&#34;. Signed-off-by: Siva Durga Prasad Paladugu &lt;siva.durga.paladugu@xilinx.com&gt; Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
6 years ago
{
return plat_power_domain_tree_desc;
}