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401 lines
5.8 KiB
401 lines
5.8 KiB
5 years ago
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/*
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* Copyright (c) 2020, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef FVP_DEFS_DTSI
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#define FVP_DEFS_DTSI
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/* Set default topology values if not passed from platform's makefile */
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#ifndef CLUSTER_COUNT
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#ifdef FVP_CLUSTER_COUNT
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#define CLUSTER_COUNT FVP_CLUSTER_COUNT
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#else
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#define CLUSTER_COUNT 2
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#endif
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#endif /* CLUSTER_COUNT */
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#ifndef CPUS_PER_CLUSTER
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#ifdef FVP_MAX_CPUS_PER_CLUSTER
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#define CPUS_PER_CLUSTER FVP_MAX_CPUS_PER_CLUSTER
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#else
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#define CPUS_PER_CLUSTER 4
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#endif
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#endif /* CPUS_PER_CLUSTER */
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/* Get platform's topology */
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#define CPUS_COUNT (CLUSTER_COUNT * CPUS_PER_CLUSTER)
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#define CONCAT(x, y) x##y
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#define CONC(x, y) CONCAT(x, y)
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/* CPU's cluster */
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#define CLS(n) (n / CPUS_PER_CLUSTER)
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/* CPU's position in cluster */
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#define POS(n) (n % CPUS_PER_CLUSTER)
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#define ADR(n, c, p) \
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CPU##n:cpu@CONC(c, CONC(p, AFF)) {
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#define PRE \
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device_type = "cpu"; \
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compatible = "arm,armv8";
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#ifdef REG_32
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/* 32-bit address */
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#define REG(c, p) \
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reg = <CONC(0x, CONC(c, CONC(p, AFF)))>;
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#else
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/* 64-bit address */
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#define REG(c, p) \
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reg = <0x0 CONC(0x, CONC(c, CONC(p, AFF)))>;
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#endif /* REG_32 */
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#define POST \
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enable-method = "psci"; \
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cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>; \
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next-level-cache = <&L2_0>; \
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};
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#ifdef REG_32
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#define CPU_0 \
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CPU0:cpu@0 { \
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PRE \
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reg = <0x0>; \
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POST
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#else
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#define CPU_0 \
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CPU0:cpu@0 { \
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PRE \
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reg = <0x0 0x0>;\
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POST
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#endif /* REG_32 */
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/*
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* n - CPU number
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*/
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#define CPU(n, c, p) \
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ADR(n, c, p) \
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PRE \
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REG(c, p) \
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POST
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/* 2 CPUs */
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#if (CPUS_COUNT > 1)
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#if (CLS(1) == 0)
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#define c1
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#define p1 1
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#else
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#define c1 10
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#define p1 0
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#endif
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#define CPU_1 CPU(1, c1, p1) /* CPU1: 0.1; 1.0 */
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/* 3 CPUs */
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#if (CPUS_COUNT > 2)
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#if (CLS(2) == 0)
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#define c2
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#define p2 2
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#elif (CLS(2) == 1)
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#define c2 10
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#define p2 0
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#else
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#define c2 20
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#define p2 0
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#endif
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#define CPU_2 CPU(2, c2, p2) /* CPU2: 0.2; 1.0; 2.0 */
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/* 4 CPUs */
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#if (CPUS_COUNT > 3)
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#if (CLS(3) == 0)
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#define c3
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#elif (CLS(3) == 1)
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#define c3 10
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#else
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#define c3 30
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#endif
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#if (POS(3) == 0)
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#define p3 0
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#elif (POS(3) == 1)
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#define p3 1
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#else
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#define p3 3
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#endif
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#define CPU_3 CPU(3, c3, p3) /* CPU3: 0.3; 1.0; 1.1; 3.0 */
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/* 6 CPUs */
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#if (CPUS_COUNT > 4)
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#if (CLS(4) == 1)
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#define c4 10
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#else
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#define c4 20
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#endif
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#if (POS(4) == 0)
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#define p4 0
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#else
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#define p4 1
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#endif
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#if (CLS(5) == 1)
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#define c5 10
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#else
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#define c5 20
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#endif
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#if (POS(5) == 1)
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#define p5 1
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#else
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#define p5 2
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#endif
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#define CPU_4 CPU(4, c4, p4) /* CPU4: 1.0; 1.1; 2.0 */
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#define CPU_5 CPU(5, c5, p5) /* CPU5: 1.1; 1.2; 2.1 */
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/* 8 CPUs */
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#if (CPUS_COUNT > 6)
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#if (CLS(6) == 1)
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#define c6 10
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#define p6 2
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#elif (CLS(6) == 2)
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#define c6 20
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#define p6 0
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#else
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#define c6 30
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#define p6 0
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#endif
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#if (CLS(7) == 1)
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#define c7 10
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#define p7 3
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#elif (CLS(7) == 2)
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#define c7 20
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#define p7 1
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#else
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#define c7 30
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#define p7 1
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#endif
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#define CPU_6 CPU(6, c6, p6) /* CPU6: 1.2; 2.0; 3.0 */
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#define CPU_7 CPU(7, c7, p7) /* CPU7: 1.3; 2.1; 3.1 */
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/* 9 CPUs */
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#if (CPUS_COUNT > 8)
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#if (POS(8) == 0)
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#define p8 0
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#else
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#define p8 2
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#endif
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#define CPU_8 CPU(8, 20, p8) /* CPU8: 2.0; 2.2 */
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/* 12 CPUs */
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#if (CPUS_COUNT > 9)
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#if (CLS(9) == 2)
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#define c9 20
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#define p9 1
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#else
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#define c9 30
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#define p9 0
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#endif
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#if (CLS(10) == 2)
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#define c10 20
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#define p10 2
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#else
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#define c10 30
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#define p10 1
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#endif
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#if (CLS(11) == 2)
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#define c11 20
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#define p11 3
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#else
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#define c11 30
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#define p11 2
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#endif
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#define CPU_9 CPU(9, c9, p9) /* CPU9: 2.1; 3.0 */
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#define CPU_10 CPU(10, c10, p10) /* CPU10: 2.2; 3.1 */
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#define CPU_11 CPU(11, c11, p11) /* CPU11: 2.3; 3.2 */
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/* 16 CPUs */
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#if (CPUS_COUNT > 12)
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#define CPU_12 CPU(12, 30, 0) /* CPU12: 3.0 */
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#define CPU_13 CPU(13, 30, 1) /* CPU13: 3.1 */
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#define CPU_14 CPU(14, 30, 2) /* CPU14: 3.2 */
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#define CPU_15 CPU(15, 30, 3) /* CPU15: 3.3 */
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#endif /* > 12 */
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#endif /* > 9 */
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#endif /* > 8 */
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#endif /* > 6 */
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#endif /* > 4 */
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#endif /* > 3 */
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#endif /* > 2 */
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#endif /* > 1 */
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#if (CPUS_COUNT == 1)
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#define CPUS \
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CPU_0
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#elif (CPUS_COUNT == 2)
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#define CPUS \
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CPU_0 \
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CPU_1
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#elif (CPUS_COUNT == 3)
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#define CPUS \
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CPU_0 \
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CPU_1 \
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CPU_2
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#elif (CPUS_COUNT == 4)
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#define CPUS \
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CPU_0 \
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CPU_1 \
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CPU_2 \
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CPU_3
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#elif (CPUS_COUNT == 6)
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#define CPUS \
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CPU_0 \
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CPU_1 \
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CPU_2 \
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CPU_3 \
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CPU_4 \
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CPU_5
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#elif (CPUS_COUNT == 8)
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#define CPUS \
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CPU_0 \
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CPU_1 \
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CPU_2 \
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CPU_3 \
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CPU_4 \
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CPU_5 \
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CPU_6 \
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CPU_7
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#elif (CPUS_COUNT == 9)
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#define CPUS \
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CPU_0 \
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CPU_1 \
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CPU_2 \
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CPU_3 \
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CPU_4 \
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CPU_5 \
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CPU_6 \
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CPU_7 \
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CPU_8
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#elif (CPUS_COUNT == 12)
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#define CPUS \
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CPU_0 \
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CPU_1 \
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CPU_2 \
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CPU_3 \
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CPU_4 \
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CPU_5 \
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CPU_6 \
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CPU_7 \
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CPU_8 \
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CPU_9 \
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CPU_10 \
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CPU_11
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#else
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#define CPUS \
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CPU_0 \
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CPU_1 \
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CPU_2 \
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CPU_3 \
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CPU_4 \
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CPU_5 \
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CPU_6 \
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CPU_7 \
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CPU_8 \
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CPU_9 \
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CPU_10 \
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CPU_11 \
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CPU_12 \
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CPU_13 \
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CPU_14 \
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CPU_15
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#endif /* CPUS_COUNT */
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#define CORE(n) \
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core##n { \
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cpu = <&CONC(CPU, __COUNTER__)>; \
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};
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/* Max 4 CPUs per cluster */
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#if (CPUS_PER_CLUSTER == 1)
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#define CLUSTER(n) \
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cluster##n { \
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CORE(0) \
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};
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#elif (CPUS_PER_CLUSTER == 2)
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#define CLUSTER(n) \
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cluster##n { \
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CORE(0) \
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CORE(1) \
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};
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#elif (CPUS_PER_CLUSTER == 3)
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#define CLUSTER(n) \
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cluster##n { \
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CORE(0) \
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CORE(1) \
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CORE(2) \
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};
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#else
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#define CLUSTER(n) \
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cluster##n { \
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CORE(0) \
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CORE(1) \
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CORE(2) \
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CORE(3) \
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};
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#endif /* CPUS_PER_CLUSTER */
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/* Max 4 clusters */
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#if (CLUSTER_COUNT == 1)
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#define CPU_MAP \
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cpu-map { \
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CLUSTER(0) \
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};
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#elif (CLUSTER_COUNT == 2)
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#define CPU_MAP \
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cpu-map { \
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CLUSTER(0) \
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CLUSTER(1) \
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};
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#elif (CLUSTER_COUNT == 3)
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#define CPU_MAP \
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cpu-map { \
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CLUSTER(0) \
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CLUSTER(1) \
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CLUSTER(2) \
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};
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#else
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#define CPU_MAP \
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cpu-map { \
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CLUSTER(0) \
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CLUSTER(1) \
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CLUSTER(2) \
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CLUSTER(3) \
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};
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#endif /* CLUSTER_COUNT */
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#endif /* FVP_DEFS_DTSI */
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