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65 lines
1.8 KiB
65 lines
1.8 KiB
7 years ago
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/*
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#define PLATFORM_LINKER_FORMAT "elf64-littleaarch64"
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#define PLATFORM_LINKER_ARCH aarch64
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#define PLATFORM_STACK_SIZE 0X400
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#define CACHE_WRITEBACK_GRANULE 64
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#define PLAT_PRIMARY_CPU 0x0
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#define PLATFORM_MAX_CPU_PER_CLUSTER 4
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#define PLATFORM_CLUSTER_COUNT 2
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#define PLATFORM_CLUSTER0_CORE_COUNT 4
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#define PLATFORM_CLUSTER1_CORE_COUNT 2
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#define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER0_CORE_COUNT + \
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PLATFORM_CLUSTER1_CORE_COUNT)
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#define IMX_PWR_LVL0 MPIDR_AFFLVL0
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#define IMX_PWR_LVL1 MPIDR_AFFLVL1
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#define IMX_PWR_LVL2 MPIDR_AFFLVL2
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#define PWR_DOMAIN_AT_MAX_LVL 1
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#define PLAT_MAX_PWR_LVL 2
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#define PLAT_MAX_OFF_STATE 2
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#define PLAT_MAX_RET_STATE 1
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#define BL31_BASE 0x80000000
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#define BL31_LIMIT 0x80020000
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#define PLAT_GICD_BASE 0x51a00000
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#define PLAT_GICD_SIZE 0x10000
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#define PLAT_GICR_BASE 0x51b00000
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#define PLAT_GICR_SIZE 0xc0000
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#define PLAT_CCI_BASE 0x52090000
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#define PLAT_CCI_SIZE 0x10000
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#define CLUSTER0_CCI_SLVAE_IFACE 3
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#define CLUSTER1_CCI_SLVAE_IFACE 4
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#define IMX_BOOT_UART_BASE 0x5a060000
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#define IMX_BOOT_UART_SIZE 0x1000
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#define IMX_BOOT_UART_BAUDRATE 115200
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#define IMX_BOOT_UART_CLK_IN_HZ 24000000
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#define PLAT_CRASH_UART_BASE IMX_BOOT_UART_BASE
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#define PLAT__CRASH_UART_CLK_IN_HZ 24000000
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#define IMX_CONSOLE_BAUDRATE 115200
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#define SC_IPC_BASE 0x5d1b0000
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#define SC_IPC_SIZE 0x10000
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#define COUNTER_FREQUENCY 8000000 /* 8MHz */
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/* non-secure uboot base */
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#define PLAT_NS_IMAGE_OFFSET 0x80020000
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#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 32)
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#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 32)
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#define MAX_XLAT_TABLES 8
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#define MAX_MMAP_REGIONS 12
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#define DEBUG_CONSOLE 0
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#define DEBUG_CONSOLE_A53 0
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#define PLAT_IMX8QM 1
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