From 1a9d5d1e144aa90bc2694342ca95e2197c18f6c8 Mon Sep 17 00:00:00 2001 From: Sona Mathew Date: Mon, 19 Jun 2023 22:15:51 -0500 Subject: [PATCH] refactor(cpus): convert Cortex-X3 to use the errata framework This involves replacing: * the reset_func with the standard cpu_reset_func_{start,end} to apply errata automatically * the _errata_report with the errata_report_shim to report errata automatically ...and for each erratum: * the prologue with the workaround__start to do the checks and framework registration automatically * the epilogue with the workaround__end * the checker function with the check_erratum_ to make it more descriptive * Manual comparison of disassembly of converted functions with non- converted functions. aarch64-none-elf-objdump -D /build/../release/bl31/bl31.elf vs aarch64-none-elf-objdump -D /build/fvp/release/bl31/bl31.elf * Build for debug with all errata enabled and step through ArmDS at reset to ensure all functions are entered. Change-Id: I62e030962edf4e8e8be2c19e7a3176e319468c50 Signed-off-by: Sona Mathew --- lib/cpus/aarch64/cortex_x3.S | 122 ++++++----------------------------- 1 file changed, 19 insertions(+), 103 deletions(-) diff --git a/lib/cpus/aarch64/cortex_x3.S b/lib/cpus/aarch64/cortex_x3.S index 36a7e0a1f..20c3060c6 100644 --- a/lib/cpus/aarch64/cortex_x3.S +++ b/lib/cpus/aarch64/cortex_x3.S @@ -26,108 +26,45 @@ wa_cve_2022_23960_bhb_vector_table CORTEX_X3_BHB_LOOP_COUNT, cortex_x3 #endif /* WORKAROUND_CVE_2022_23960 */ -/* ---------------------------------------------------------------------- - * Errata Workaround for Cortex-X3 Erratum 2313909 on power down request. - * This applies to revision r0p0 and r1p0 of Cortex-X3. Fixed in r1p1. - * Inputs: - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x1, x17 - * ---------------------------------------------------------------------- - */ -func errata_cortex_x3_2313909_wa - /* Check revision. */ - mov x17, x30 - bl check_errata_2313909 - cbz x0, 1f - +workaround_runtime_start cortex_x3, ERRATUM(2313909), ERRATA_X3_2313909 /* Set bit 36 in ACTLR2_EL1 */ mrs x1, CORTEX_X3_CPUACTLR2_EL1 orr x1, x1, #CORTEX_X3_CPUACTLR2_EL1_BIT_36 msr CORTEX_X3_CPUACTLR2_EL1, x1 -1: - ret x17 -endfunc errata_cortex_x3_2313909_wa - -func check_errata_2313909 - /* Applies to r0p0 and r1p0 */ - mov x1, #0x10 - b cpu_rev_var_ls -endfunc check_errata_2313909 - -/* ---------------------------------------------------------------------- - * Errata Workaround for Cortex-X3 Erratum 2615812 on power-on. - * This applies to revision r0p0, r1p0, r1p1 of Cortex-X3. Open. - * Inputs: - * x0: variant[4:7] and revision[0:3] of current cpu. - * Shall clobber: x0-x1, x17 - * ---------------------------------------------------------------------- - */ -func errata_cortex_x3_2615812_wa - /* Check revision. */ - mov x17, x30 - bl check_errata_2615812 - cbz x0, 1f +workaround_runtime_end cortex_x3, ERRATUM(2313909), NO_ISB +check_erratum_ls cortex_x3, ERRATUM(2313909), CPU_REV(1, 0) + +workaround_reset_start cortex_x3, ERRATUM(2615812), ERRATA_X3_2615812 /* Disable retention control for WFI and WFE. */ mrs x0, CORTEX_X3_CPUPWRCTLR_EL1 bfi x0, xzr, #CORTEX_X3_CPUPWRCTLR_EL1_WFI_RET_CTRL_BITS_SHIFT, #3 bfi x0, xzr, #CORTEX_X3_CPUPWRCTLR_EL1_WFE_RET_CTRL_BITS_SHIFT, #3 msr CORTEX_X3_CPUPWRCTLR_EL1, x0 -1: - ret x17 -endfunc errata_cortex_x3_2615812_wa +workaround_reset_end cortex_x3, ERRATUM(2615812) -func check_errata_2615812 - /* Applies to r1p1 and below. */ - mov x1, #0x11 - b cpu_rev_var_ls -endfunc check_errata_2615812 +check_erratum_ls cortex_x3, ERRATUM(2615812), CPU_REV(1, 1) -func check_errata_cve_2022_23960 -#if WORKAROUND_CVE_2022_23960 - mov x0, #ERRATA_APPLIES -#else - mov x0, #ERRATA_MISSING -#endif - ret -endfunc check_errata_cve_2022_23960 +workaround_reset_start cortex_x3, CVE(2022, 23960), WORKAROUND_CVE_2022_23960 +#if IMAGE_BL31 + adr x0, wa_cve_vbar_cortex_x3 + msr vbar_el3, x0 +#endif /* IMAGE_BL31 */ +workaround_reset_end cortex_x3, CVE(2022, 23960) + +check_erratum_chosen cortex_x3, CVE(2022, 23960), WORKAROUND_CVE_2022_23960 -func cortex_x3_reset_func - mov x19, x30 +cpu_reset_func_start cortex_x3 /* Disable speculative loads */ msr SSBS, xzr - -#if IMAGE_BL31 && WORKAROUND_CVE_2022_23960 - /* - * The Cortex-X3 generic vectors are overridden to apply - * errata mitigation on exception entry from lower ELs. - */ - adr x0, wa_cve_vbar_cortex_x3 - msr vbar_el3, x0 -#endif /* IMAGE_BL31 && WORKAROUND_CVE_2022_23960 */ - - bl cpu_get_rev_var - -#if ERRATA_X3_2615812 - bl errata_cortex_x3_2615812_wa -#endif /* ERRATA_X3_2615812 */ - - isb - ret x19 -endfunc cortex_x3_reset_func +cpu_reset_func_end cortex_x3 /* ---------------------------------------------------- * HW will do the cache maintenance while powering down * ---------------------------------------------------- */ func cortex_x3_core_pwr_dwn -#if ERRATA_X3_2313909 - mov x15, x30 - bl cpu_get_rev_var - bl errata_cortex_x3_2313909_wa - mov x30, x15 -#endif /* ERRATA_X3_2313909 */ - +apply_erratum cortex_x3, ERRATUM(2313909), ERRATA_X3_2313909 /* --------------------------------------------------- * Enable CPU power down bit in power control register * --------------------------------------------------- @@ -139,28 +76,7 @@ func cortex_x3_core_pwr_dwn ret endfunc cortex_x3_core_pwr_dwn -#if REPORT_ERRATA - /* - * Errata printing function for Cortex-X3. Must follow AAPCS. - */ -func cortex_x3_errata_report - stp x8, x30, [sp, #-16]! - - bl cpu_get_rev_var - mov x8, x0 - - /* - * Report all errata. The revision-variant information is passed to - * checking functions of each errata. - */ - report_errata ERRATA_X3_2313909, cortex_x3, 2313909 - report_errata ERRATA_X3_2615812, cortex_x3, 2615812 - report_errata WORKAROUND_CVE_2022_23960, cortex_x3, cve_2022_23960 - - ldp x8, x30, [sp], #16 - ret -endfunc cortex_x3_errata_report -#endif +errata_report_shim cortex_x3 /* --------------------------------------------- * This function provides Cortex-X3-