diff --git a/drivers/mtd/nand/spi_nand.c b/drivers/mtd/nand/spi_nand.c index 542b614ff..744383aa3 100644 --- a/drivers/mtd/nand/spi_nand.c +++ b/drivers/mtd/nand/spi_nand.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2022, STMicroelectronics - All Rights Reserved + * Copyright (c) 2019-2023, STMicroelectronics - All Rights Reserved * * SPDX-License-Identifier: BSD-3-Clause */ @@ -17,7 +17,6 @@ #define SPI_NAND_MAX_ID_LEN 4U #define DELAY_US_400MS 400000U -#define MACRONIX_ID 0xC2U static struct spinand_device spinand_dev; @@ -91,7 +90,7 @@ static int spi_nand_quad_enable(uint8_t manufacturer_id) { bool enable = false; - if (manufacturer_id != MACRONIX_ID) { + if ((spinand_dev.flags & SPI_NAND_HAS_QE_BIT) == 0U) { return 0; } diff --git a/drivers/st/clk/clk-stm32mp13.c b/drivers/st/clk/clk-stm32mp13.c index db427ad6f..01d176400 100644 --- a/drivers/st/clk/clk-stm32mp13.c +++ b/drivers/st/clk/clk-stm32mp13.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2022, STMicroelectronics - All Rights Reserved + * Copyright (C) 2022-2023, STMicroelectronics - All Rights Reserved * * SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */ @@ -1216,7 +1216,7 @@ static int stm32_clk_source_configure(struct stm32_clk_priv *priv) * => deactivate CKPER only after switching clock */ if (ckper_disabled) { - ret = stm32_clk_configure_mux(priv, CLK_CKPER_DISABLED & CMD_MASK); + ret = stm32_clk_configure_mux(priv, CLK_CKPER_DISABLED); if (ret != 0) { return ret; } diff --git a/drivers/st/uart/aarch32/stm32_console.S b/drivers/st/uart/aarch32/stm32_console.S index e3e0e67d3..d64a6cd97 100644 --- a/drivers/st/uart/aarch32/stm32_console.S +++ b/drivers/st/uart/aarch32/stm32_console.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2022, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2018-2023, Arm Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -234,11 +234,16 @@ func console_stm32_core_flush cmp r0, #0 ASM_ASSERT(ne) #endif /* ENABLE_ASSERTIONS */ + /* Skip flush if UART is not enabled */ + ldr r1, [r0, #USART_CR1] + ands r1, r1, #USART_CR1_UE + beq 1f /* Check Transmit Data Register Empty */ txe_loop_3: ldr r1, [r0, #USART_ISR] tst r1, #USART_ISR_TXE beq txe_loop_3 +1: bx lr endfunc console_stm32_core_flush diff --git a/fdts/stm32mp13-bl2.dtsi b/fdts/stm32mp13-bl2.dtsi index 06db79662..2b23daf39 100644 --- a/fdts/stm32mp13-bl2.dtsi +++ b/fdts/stm32mp13-bl2.dtsi @@ -3,6 +3,15 @@ * Copyright (c) 2022-2023, STMicroelectronics - All Rights Reserved */ +/omit-if-no-ref/ &i2c4_pins_a; +/omit-if-no-ref/ &sdmmc1_b4_pins_a; +/omit-if-no-ref/ &sdmmc1_clk_pins_a; +/omit-if-no-ref/ &sdmmc2_b4_pins_a; +/omit-if-no-ref/ &sdmmc2_clk_pins_a; +/omit-if-no-ref/ &uart4_pins_a; +/omit-if-no-ref/ &uart8_pins_a; +/omit-if-no-ref/ &usart1_pins_a; + / { aliases { #if !STM32MP_EMMC && !STM32MP_SDMMC diff --git a/fdts/stm32mp13-pinctrl.dtsi b/fdts/stm32mp13-pinctrl.dtsi index 012937219..323d5ba66 100644 --- a/fdts/stm32mp13-pinctrl.dtsi +++ b/fdts/stm32mp13-pinctrl.dtsi @@ -6,7 +6,7 @@ #include &pinctrl { - /omit-if-no-ref/ i2c4_pins_a: i2c4-0 { + i2c4_pins_a: i2c4-0 { pins { pinmux = , /* I2C4_SCL */ ; /* I2C4_SDA */ @@ -16,7 +16,7 @@ }; }; - /omit-if-no-ref/ sdmmc1_b4_pins_a: sdmmc1-b4-0 { + sdmmc1_b4_pins_a: sdmmc1-b4-0 { pins { pinmux = , /* SDMMC1_D0 */ , /* SDMMC1_D1 */ @@ -29,7 +29,7 @@ }; }; - /omit-if-no-ref/ sdmmc1_clk_pins_a: sdmmc1-clk-0 { + sdmmc1_clk_pins_a: sdmmc1-clk-0 { pins { pinmux = ; /* SDMMC1_CK */ slew-rate = <1>; @@ -38,7 +38,7 @@ }; }; - /omit-if-no-ref/ sdmmc2_b4_pins_a: sdmmc2-b4-0 { + sdmmc2_b4_pins_a: sdmmc2-b4-0 { pins { pinmux = , /* SDMMC2_D0 */ , /* SDMMC2_D1 */ @@ -51,7 +51,7 @@ }; }; - /omit-if-no-ref/ sdmmc2_clk_pins_a: sdmmc2-clk-0 { + sdmmc2_clk_pins_a: sdmmc2-clk-0 { pins { pinmux = ; /* SDMMC2_CK */ slew-rate = <1>; @@ -60,7 +60,7 @@ }; }; - /omit-if-no-ref/ uart4_pins_a: uart4-0 { + uart4_pins_a: uart4-0 { pins1 { pinmux = ; /* UART4_TX */ bias-disable; @@ -73,7 +73,7 @@ }; }; - /omit-if-no-ref/ usart1_pins_a: usart1-0 { + usart1_pins_a: usart1-0 { pins1 { pinmux = , /* USART1_TX */ ; /* USART1_RTS */ @@ -88,7 +88,7 @@ }; }; - /omit-if-no-ref/ uart8_pins_a: uart8-0 { + uart8_pins_a: uart8-0 { pins1 { pinmux = ; /* UART8_TX */ bias-disable; diff --git a/fdts/stm32mp131.dtsi b/fdts/stm32mp131.dtsi index 543afa5c4..2be39afcf 100644 --- a/fdts/stm32mp131.dtsi +++ b/fdts/stm32mp131.dtsi @@ -416,7 +416,7 @@ }; bsec: efuse@5c005000 { - compatible = "st,stm32mp15-bsec"; + compatible = "st,stm32mp13-bsec"; reg = <0x5c005000 0x400>; #address-cells = <1>; #size-cells = <1>; diff --git a/fdts/stm32mp15-bl2.dtsi b/fdts/stm32mp15-bl2.dtsi index 18a4ba932..53aeec55e 100644 --- a/fdts/stm32mp15-bl2.dtsi +++ b/fdts/stm32mp15-bl2.dtsi @@ -3,8 +3,37 @@ * Copyright (c) 2020-2023, STMicroelectronics - All Rights Reserved */ +/omit-if-no-ref/ &fmc_pins_a; +/omit-if-no-ref/ &i2c2_pins_a; +/omit-if-no-ref/ &i2c4_pins_a; /omit-if-no-ref/ &i2c6; +/omit-if-no-ref/ &qspi_bk1_pins_a; +/omit-if-no-ref/ &qspi_bk2_pins_a; +/omit-if-no-ref/ &qspi_clk_pins_a; +/omit-if-no-ref/ &sdmmc1_b4_pins_a; +/omit-if-no-ref/ &sdmmc1_dir_pins_a; +/omit-if-no-ref/ &sdmmc1_dir_pins_b; +/omit-if-no-ref/ &sdmmc2_b4_pins_a; +/omit-if-no-ref/ &sdmmc2_b4_pins_b; +/omit-if-no-ref/ &sdmmc2_d47_pins_a; +/omit-if-no-ref/ &sdmmc2_d47_pins_b; +/omit-if-no-ref/ &sdmmc2_d47_pins_c; +/omit-if-no-ref/ &sdmmc2_d47_pins_d; /omit-if-no-ref/ &spi6; +/omit-if-no-ref/ &uart4_pins_a; +/omit-if-no-ref/ &uart4_pins_b; +/omit-if-no-ref/ &uart7_pins_a; +/omit-if-no-ref/ &uart7_pins_b; +/omit-if-no-ref/ &uart7_pins_c; +/omit-if-no-ref/ &uart8_pins_a; +/omit-if-no-ref/ &usart2_pins_a; +/omit-if-no-ref/ &usart2_pins_b; +/omit-if-no-ref/ &usart2_pins_c; +/omit-if-no-ref/ &usart3_pins_a; +/omit-if-no-ref/ &usart3_pins_b; +/omit-if-no-ref/ &usart3_pins_c; +/omit-if-no-ref/ &usbotg_fs_dp_dm_pins_a; +/omit-if-no-ref/ &usbotg_hs_pins_a; / { #if !STM32MP_EMMC && !STM32MP_SDMMC diff --git a/fdts/stm32mp15-bl32.dtsi b/fdts/stm32mp15-bl32.dtsi index 688222498..7b63f1bda 100644 --- a/fdts/stm32mp15-bl32.dtsi +++ b/fdts/stm32mp15-bl32.dtsi @@ -3,8 +3,37 @@ * Copyright (c) 2020-2023, STMicroelectronics - All Rights Reserved */ +/omit-if-no-ref/ &fmc_pins_a; +/omit-if-no-ref/ &i2c2_pins_a; +/omit-if-no-ref/ &i2c4_pins_a; /omit-if-no-ref/ &i2c6; +/omit-if-no-ref/ &qspi_bk1_pins_a; +/omit-if-no-ref/ &qspi_bk2_pins_a; +/omit-if-no-ref/ &qspi_clk_pins_a; +/omit-if-no-ref/ &sdmmc1_b4_pins_a; +/omit-if-no-ref/ &sdmmc1_dir_pins_a; +/omit-if-no-ref/ &sdmmc1_dir_pins_b; +/omit-if-no-ref/ &sdmmc2_b4_pins_a; +/omit-if-no-ref/ &sdmmc2_b4_pins_b; +/omit-if-no-ref/ &sdmmc2_d47_pins_a; +/omit-if-no-ref/ &sdmmc2_d47_pins_b; +/omit-if-no-ref/ &sdmmc2_d47_pins_c; +/omit-if-no-ref/ &sdmmc2_d47_pins_d; /omit-if-no-ref/ &spi6; +/omit-if-no-ref/ &uart4_pins_a; +/omit-if-no-ref/ &uart4_pins_b; +/omit-if-no-ref/ &uart7_pins_a; +/omit-if-no-ref/ &uart7_pins_b; +/omit-if-no-ref/ &uart7_pins_c; +/omit-if-no-ref/ &uart8_pins_a; +/omit-if-no-ref/ &usart2_pins_a; +/omit-if-no-ref/ &usart2_pins_b; +/omit-if-no-ref/ &usart2_pins_c; +/omit-if-no-ref/ &usart3_pins_a; +/omit-if-no-ref/ &usart3_pins_b; +/omit-if-no-ref/ &usart3_pins_c; +/omit-if-no-ref/ &usbotg_fs_dp_dm_pins_a; +/omit-if-no-ref/ &usbotg_hs_pins_a; / { aliases { diff --git a/fdts/stm32mp15-pinctrl.dtsi b/fdts/stm32mp15-pinctrl.dtsi index 8dc00feb8..a1be44781 100644 --- a/fdts/stm32mp15-pinctrl.dtsi +++ b/fdts/stm32mp15-pinctrl.dtsi @@ -6,7 +6,7 @@ #include &pinctrl { - /omit-if-no-ref/ fmc_pins_a: fmc-0 { + fmc_pins_a: fmc-0 { pins1 { pinmux = , /* FMC_NOE */ , /* FMC_NWE */ @@ -31,7 +31,7 @@ }; }; - /omit-if-no-ref/ i2c2_pins_a: i2c2-0 { + i2c2_pins_a: i2c2-0 { pins { pinmux = , /* I2C2_SCL */ ; /* I2C2_SDA */ @@ -41,7 +41,7 @@ }; }; - /omit-if-no-ref/ qspi_clk_pins_a: qspi-clk-0 { + qspi_clk_pins_a: qspi-clk-0 { pins { pinmux = ; /* QSPI_CLK */ bias-disable; @@ -50,7 +50,7 @@ }; }; - /omit-if-no-ref/ qspi_bk1_pins_a: qspi-bk1-0 { + qspi_bk1_pins_a: qspi-bk1-0 { pins1 { pinmux = , /* QSPI_BK1_IO0 */ , /* QSPI_BK1_IO1 */ @@ -68,7 +68,7 @@ }; }; - /omit-if-no-ref/ qspi_bk2_pins_a: qspi-bk2-0 { + qspi_bk2_pins_a: qspi-bk2-0 { pins1 { pinmux = , /* QSPI_BK2_IO0 */ , /* QSPI_BK2_IO1 */ @@ -86,7 +86,7 @@ }; }; - /omit-if-no-ref/ sdmmc1_b4_pins_a: sdmmc1-b4-0 { + sdmmc1_b4_pins_a: sdmmc1-b4-0 { pins1 { pinmux = , /* SDMMC1_D0 */ , /* SDMMC1_D1 */ @@ -105,7 +105,7 @@ }; }; - /omit-if-no-ref/ sdmmc1_dir_pins_a: sdmmc1-dir-0 { + sdmmc1_dir_pins_a: sdmmc1-dir-0 { pins1 { pinmux = , /* SDMMC1_D0DIR */ , /* SDMMC1_D123DIR */ @@ -120,7 +120,7 @@ }; }; - /omit-if-no-ref/ sdmmc1_dir_pins_b: sdmmc1-dir-1 { + sdmmc1_dir_pins_b: sdmmc1-dir-1 { pins1 { pinmux = , /* SDMMC1_D0DIR */ , /* SDMMC1_D123DIR */ @@ -135,7 +135,7 @@ }; }; - /omit-if-no-ref/ sdmmc2_b4_pins_a: sdmmc2-b4-0 { + sdmmc2_b4_pins_a: sdmmc2-b4-0 { pins1 { pinmux = , /* SDMMC2_D0 */ , /* SDMMC2_D1 */ @@ -154,7 +154,7 @@ }; }; - /omit-if-no-ref/ sdmmc2_b4_pins_b: sdmmc2-b4-1 { + sdmmc2_b4_pins_b: sdmmc2-b4-1 { pins1 { pinmux = , /* SDMMC2_D0 */ , /* SDMMC2_D1 */ @@ -173,7 +173,7 @@ }; }; - /omit-if-no-ref/ sdmmc2_d47_pins_a: sdmmc2-d47-0 { + sdmmc2_d47_pins_a: sdmmc2-d47-0 { pins { pinmux = , /* SDMMC2_D4 */ , /* SDMMC2_D5 */ @@ -185,7 +185,7 @@ }; }; - /omit-if-no-ref/ sdmmc2_d47_pins_b: sdmmc2-d47-1 { + sdmmc2_d47_pins_b: sdmmc2-d47-1 { pins { pinmux = , /* SDMMC2_D4 */ , /* SDMMC2_D5 */ @@ -197,7 +197,7 @@ }; }; - /omit-if-no-ref/ sdmmc2_d47_pins_c: sdmmc2-d47-2 { + sdmmc2_d47_pins_c: sdmmc2-d47-2 { pins { pinmux = , /* SDMMC2_D4 */ , /* SDMMC2_D5 */ @@ -209,7 +209,7 @@ }; }; - /omit-if-no-ref/ sdmmc2_d47_pins_d: sdmmc2-d47-3 { + sdmmc2_d47_pins_d: sdmmc2-d47-3 { pins { pinmux = , /* SDMMC2_D4 */ , /* SDMMC2_D5 */ @@ -218,7 +218,7 @@ }; }; - /omit-if-no-ref/ uart4_pins_a: uart4-0 { + uart4_pins_a: uart4-0 { pins1 { pinmux = ; /* UART4_TX */ bias-disable; @@ -231,7 +231,7 @@ }; }; - /omit-if-no-ref/ uart4_pins_b: uart4-1 { + uart4_pins_b: uart4-1 { pins1 { pinmux = ; /* UART4_TX */ bias-disable; @@ -244,7 +244,7 @@ }; }; - /omit-if-no-ref/ uart7_pins_a: uart7-0 { + uart7_pins_a: uart7-0 { pins1 { pinmux = ; /* UART7_TX */ bias-disable; @@ -259,7 +259,7 @@ }; }; - /omit-if-no-ref/ uart7_pins_b: uart7-1 { + uart7_pins_b: uart7-1 { pins1 { pinmux = ; /* UART7_TX */ bias-disable; @@ -272,7 +272,7 @@ }; }; - /omit-if-no-ref/ uart7_pins_c: uart7-2 { + uart7_pins_c: uart7-2 { pins1 { pinmux = ; /* UART7_TX */ bias-disable; @@ -285,7 +285,7 @@ }; }; - /omit-if-no-ref/ uart8_pins_a: uart8-0 { + uart8_pins_a: uart8-0 { pins1 { pinmux = ; /* UART8_TX */ bias-disable; @@ -298,7 +298,7 @@ }; }; - /omit-if-no-ref/ usart2_pins_a: usart2-0 { + usart2_pins_a: usart2-0 { pins1 { pinmux = , /* USART2_TX */ ; /* USART2_RTS */ @@ -313,7 +313,7 @@ }; }; - /omit-if-no-ref/ usart2_pins_b: usart2-1 { + usart2_pins_b: usart2-1 { pins1 { pinmux = , /* USART2_TX */ ; /* USART2_RTS */ @@ -328,7 +328,7 @@ }; }; - /omit-if-no-ref/ usart2_pins_c: usart2-2 { + usart2_pins_c: usart2-2 { pins1 { pinmux = , /* USART2_TX */ ; /* USART2_RTS */ @@ -343,7 +343,7 @@ }; }; - /omit-if-no-ref/ usart3_pins_a: usart3-0 { + usart3_pins_a: usart3-0 { pins1 { pinmux = ; /* USART3_TX */ bias-disable; @@ -356,7 +356,7 @@ }; }; - /omit-if-no-ref/ usart3_pins_b: usart3-1 { + usart3_pins_b: usart3-1 { pins1 { pinmux = , /* USART3_TX */ ; /* USART3_RTS */ @@ -371,7 +371,7 @@ }; }; - /omit-if-no-ref/ usart3_pins_c: usart3-2 { + usart3_pins_c: usart3-2 { pins1 { pinmux = , /* USART3_TX */ ; /* USART3_RTS */ @@ -386,13 +386,13 @@ }; }; - /omit-if-no-ref/ usbotg_hs_pins_a: usbotg-hs-0 { + usbotg_hs_pins_a: usbotg-hs-0 { pins { pinmux = ; /* OTG_ID */ }; }; - /omit-if-no-ref/ usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 { + usbotg_fs_dp_dm_pins_a: usbotg-fs-dp-dm-0 { pins { pinmux = , /* OTG_FS_DM */ ; /* OTG_FS_DP */ @@ -401,7 +401,7 @@ }; &pinctrl_z { - /omit-if-no-ref/ i2c4_pins_a: i2c4-0 { + i2c4_pins_a: i2c4-0 { pins { pinmux = , /* I2C4_SCL */ ; /* I2C4_SDA */ diff --git a/include/drivers/spi_nand.h b/include/drivers/spi_nand.h index 40e206375..869a0c689 100644 --- a/include/drivers/spi_nand.h +++ b/include/drivers/spi_nand.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019, STMicroelectronics - All Rights Reserved + * Copyright (c) 2019-2023, STMicroelectronics - All Rights Reserved * * SPDX-License-Identifier: BSD-3-Clause */ @@ -29,9 +29,13 @@ #define SPI_NAND_STATUS_BUSY BIT(0) #define SPI_NAND_STATUS_ECC_UNCOR BIT(5) +/* Flags for specific configuration */ +#define SPI_NAND_HAS_QE_BIT BIT(0) + struct spinand_device { struct nand_device *nand_dev; struct spi_mem_op spi_read_cache_op; + uint32_t flags; uint8_t cfg_cache; /* Cached value of SPI NAND device register CFG */ }; diff --git a/plat/st/common/stm32cubeprogrammer_uart.c b/plat/st/common/stm32cubeprogrammer_uart.c index d004dcfe4..e4a5338eb 100644 --- a/plat/st/common/stm32cubeprogrammer_uart.c +++ b/plat/st/common/stm32cubeprogrammer_uart.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2021-2022, STMicroelectronics - All Rights Reserved + * Copyright (c) 2021-2023, STMicroelectronics - All Rights Reserved * * SPDX-License-Identifier: BSD-3-Clause */ @@ -481,6 +481,8 @@ static int uart_read(uint8_t id, uintptr_t buffer, size_t length) } } + stm32_uart_flush(&handle.uart); + return 0; } diff --git a/plat/st/stm32mp1/stm32mp1_def.h b/plat/st/stm32mp1/stm32mp1_def.h index 8cac4b546..df5593a7e 100644 --- a/plat/st/stm32mp1/stm32mp1_def.h +++ b/plat/st/stm32mp1/stm32mp1_def.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -647,11 +647,12 @@ static inline uintptr_t tamp_bkpr(uint32_t idx) /******************************************************************************* * Device Tree defines ******************************************************************************/ -#define DT_BSEC_COMPAT "st,stm32mp15-bsec" #if STM32MP13 +#define DT_BSEC_COMPAT "st,stm32mp13-bsec" #define DT_DDR_COMPAT "st,stm32mp13-ddr" #endif #if STM32MP15 +#define DT_BSEC_COMPAT "st,stm32mp15-bsec" #define DT_DDR_COMPAT "st,stm32mp1-ddr" #endif #define DT_IWDG_COMPAT "st,stm32mp1-iwdg" diff --git a/plat/st/stm32mp1/stm32mp1_pm.c b/plat/st/stm32mp1/stm32mp1_pm.c index 8e1c1cf99..ff2218fd3 100644 --- a/plat/st/stm32mp1/stm32mp1_pm.c +++ b/plat/st/stm32mp1/stm32mp1_pm.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -161,17 +161,15 @@ static void __dead2 stm32_system_reset(void) static int stm32_validate_power_state(unsigned int power_state, psci_power_state_t *req_state) { - int pstate = psci_get_pstate_type(power_state); - - if (pstate != 0) { + if (psci_get_pstate_type(power_state) != 0U) { return PSCI_E_INVALID_PARAMS; } - if (psci_get_pstate_pwrlvl(power_state)) { + if (psci_get_pstate_pwrlvl(power_state) != 0U) { return PSCI_E_INVALID_PARAMS; } - if (psci_get_pstate_id(power_state)) { + if (psci_get_pstate_id(power_state) != 0U) { return PSCI_E_INVALID_PARAMS; }