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@ -10,19 +10,30 @@ |
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*/ |
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#include <errno.h> |
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#include <gic_common.h> |
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#include <runtime_svc.h> |
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#include <string.h> |
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#include "../zynqmp_private.h" |
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#include "pm_api_sys.h" |
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#include "pm_client.h" |
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#include "pm_ipi.h" |
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#define PM_GET_CALLBACK_DATA 0xa01 |
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#if ZYNQMP_WDT_RESTART |
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#include <arch_helpers.h> |
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#include <gicv2.h> |
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#include <mmio.h> |
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#include <platform.h> |
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#include <spinlock.h> |
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#endif |
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#define PM_SET_SUSPEND_MODE 0xa02 |
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#define PM_GET_TRUSTZONE_VERSION 0xa03 |
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/* 0 - UP, !0 - DOWN */ |
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static int32_t pm_down = !0; |
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/* !0 - UP, 0 - DOWN */ |
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static int32_t pm_up = 0; |
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#if ZYNQMP_WDT_RESTART |
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static spinlock_t inc_lock; |
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static int active_cores = 0; |
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#endif |
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/**
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* pm_context - Structure which contains data for power management |
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@ -35,6 +46,142 @@ static struct { |
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uint32_t payload[PAYLOAD_ARG_CNT]; |
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} pm_ctx; |
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#if ZYNQMP_WDT_RESTART |
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/**
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* trigger_wdt_restart() - Trigger warm restart event to APU cores |
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* |
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* This function triggers SGI for all active APU CPUs. SGI handler then |
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* power down CPU and call system reset. |
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*/ |
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static void trigger_wdt_restart(void) |
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{ |
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uint32_t core_count = 0; |
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uint32_t core_status[3]; |
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uint32_t target_cpu_list = 0; |
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int i; |
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for (i = 0; i < 4; i++) { |
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pm_get_node_status(NODE_APU_0 + i, core_status); |
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if (core_status[0] == 1) { |
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core_count++; |
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target_cpu_list |= (1 << i); |
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} |
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} |
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spin_lock(&inc_lock); |
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active_cores = core_count; |
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spin_unlock(&inc_lock); |
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INFO("Active Cores: %d\n", active_cores); |
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/* trigger SGI to active cores */ |
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gicv2_raise_sgi(ARM_IRQ_SEC_SGI_7, target_cpu_list); |
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} |
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/**
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* ttc_fiq_handler() - TTC Handler for timer event |
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* @id number of the highest priority pending interrupt of the type |
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* that this handler was registered for |
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* @flags security state, bit[0] |
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* @handler pointer to 'cpu_context' structure of the current CPU for the |
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* security state specified in the 'flags' parameter |
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* @cookie unused |
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* |
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* Function registered as INTR_TYPE_EL3 interrupt handler |
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* |
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* When WDT event is received in PMU, PMU needs to notify master to do cleanup |
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* if required. PMU sets up timer and starts timer to overflow in zero time upon |
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* WDT event. ATF handles this timer event and takes necessary action required |
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* for warm restart. |
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* |
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* In presence of non-secure software layers (EL1/2) sets the interrupt |
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* at registered entrance in GIC and informs that PMU responsed or demands |
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* action. |
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*/ |
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static uint64_t ttc_fiq_handler(uint32_t id, uint32_t flags, void *handle, |
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void *cookie) |
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{ |
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INFO("BL31: Got TTC FIQ\n"); |
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/* Clear TTC interrupt by reading interrupt register */ |
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mmio_read_32(TTC3_INTR_REGISTER_1); |
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/* Disable the timer interrupts */ |
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mmio_write_32(TTC3_INTR_ENABLE_1, 0); |
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trigger_wdt_restart(); |
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return 0; |
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} |
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/**
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* zynqmp_sgi7_irq() - Handler for SGI7 IRQ |
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* @id number of the highest priority pending interrupt of the type |
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* that this handler was registered for |
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* @flags security state, bit[0] |
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* @handler pointer to 'cpu_context' structure of the current CPU for the |
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* security state specified in the 'flags' parameter |
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* @cookie unused |
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* |
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* Function registered as INTR_TYPE_EL3 interrupt handler |
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* |
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* On receiving WDT event from PMU, ATF generates SGI7 to all running CPUs. |
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* In response to SGI7 interrupt, each CPUs do clean up if required and last |
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* running CPU calls system restart. |
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*/ |
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static uint64_t __unused __dead2 zynqmp_sgi7_irq(uint32_t id, uint32_t flags, |
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void *handle, void *cookie) |
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{ |
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int i; |
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/* enter wfi and stay there */ |
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INFO("Entering wfi\n"); |
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spin_lock(&inc_lock); |
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active_cores--; |
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for (i = 0; i < 4; i++) { |
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mmio_write_32(BASE_GICD_BASE + GICD_CPENDSGIR + 4 * i, |
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0xffffffff); |
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} |
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spin_unlock(&inc_lock); |
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if (active_cores == 0) { |
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pm_system_shutdown(PMF_SHUTDOWN_TYPE_RESET, |
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PMF_SHUTDOWN_SUBTYPE_SUBSYSTEM); |
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} |
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/* enter wfi and stay there */ |
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while (1) |
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wfi(); |
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} |
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/**
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* pm_wdt_restart_setup() - Setup warm restart interrupts |
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* |
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* This function sets up handler for SGI7 and TTC interrupts |
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* used for warm restart. |
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*/ |
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static int pm_wdt_restart_setup(void) |
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{ |
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int ret; |
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/* register IRQ handler for SGI7 */ |
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ret = request_intr_type_el3(ARM_IRQ_SEC_SGI_7, zynqmp_sgi7_irq); |
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if (ret) { |
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WARN("BL31: registering SGI7 interrupt failed\n"); |
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goto err; |
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} |
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ret = request_intr_type_el3(IRQ_TTC3_1, ttc_fiq_handler); |
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if (ret) |
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WARN("BL31: registering TTC3 interrupt failed\n"); |
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err: |
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return ret; |
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} |
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#endif |
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/**
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* pm_setup() - PM service setup |
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* |
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@ -52,11 +199,14 @@ int pm_setup(void) |
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{ |
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int status, ret; |
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if (!zynqmp_is_pmu_up()) |
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return -ENODEV; |
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status = pm_ipi_init(primary_proc); |
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#if ZYNQMP_WDT_RESTART |
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status = pm_wdt_restart_setup(); |
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if (status) |
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WARN("BL31: warm-restart setup failed\n"); |
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#endif |
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if (status >= 0) { |
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INFO("BL31: PM Service Init Complete: API v%d.%d\n", |
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PM_VERSION_MAJOR, PM_VERSION_MINOR); |
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@ -66,7 +216,7 @@ int pm_setup(void) |
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ret = status; |
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} |
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pm_down = status; |
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pm_up = !status; |
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return ret; |
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} |
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@ -95,7 +245,7 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, |
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uint32_t pm_arg[4]; |
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/* Handle case where PM wasn't initialized properly */ |
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if (pm_down) |
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if (!pm_up) |
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SMC_RET1(handle, SMC_UNK); |
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pm_arg[0] = (uint32_t)x1; |
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@ -116,9 +266,16 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, |
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SMC_RET1(handle, (uint64_t)ret); |
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case PM_REQ_WAKEUP: |
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ret = pm_req_wakeup(pm_arg[0], pm_arg[1], pm_arg[2], |
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{ |
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/* Use address flag is encoded in the 1st bit of the low-word */ |
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unsigned int set_addr = pm_arg[1] & 0x1; |
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uint64_t address = (uint64_t)pm_arg[2] << 32; |
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address |= pm_arg[1] & (~0x1); |
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ret = pm_req_wakeup(pm_arg[0], set_addr, address, |
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pm_arg[3]); |
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SMC_RET1(handle, (uint64_t)ret); |
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} |
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case PM_FORCE_POWERDOWN: |
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ret = pm_force_powerdown(pm_arg[0], pm_arg[1]); |
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@ -175,10 +332,19 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, |
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ret = pm_set_configuration(pm_arg[0]); |
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SMC_RET1(handle, (uint64_t)ret); |
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case PM_GET_NODE_STATUS: |
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ret = pm_get_node_status(pm_arg[0]); |
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case PM_INIT_FINALIZE: |
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ret = pm_init_finalize(); |
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SMC_RET1(handle, (uint64_t)ret); |
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case PM_GET_NODE_STATUS: |
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{ |
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uint32_t buff[3]; |
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ret = pm_get_node_status(pm_arg[0], buff); |
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SMC_RET2(handle, (uint64_t)ret | ((uint64_t)buff[0] << 32), |
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(uint64_t)buff[1] | ((uint64_t)buff[2] << 32)); |
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} |
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case PM_GET_OP_CHARACTERISTIC: |
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{ |
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uint32_t result; |
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@ -239,15 +405,10 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, |
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result[1]); |
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} |
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case PM_GET_CALLBACK_DATA: |
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{ |
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uint32_t result[4]; |
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pm_get_callbackdata(result, sizeof(result)); |
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SMC_RET2(handle, |
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(uint64_t)result[0] | ((uint64_t)result[1] << 32), |
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(uint64_t)result[2] | ((uint64_t)result[3] << 32)); |
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} |
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case PM_SECURE_RSA_AES: |
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ret = pm_secure_rsaaes(pm_arg[0], pm_arg[1], pm_arg[2], |
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pm_arg[3]); |
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SMC_RET1(handle, (uint64_t)ret); |
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case PM_PINCTRL_REQUEST: |
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ret = pm_pinctrl_request(pm_arg[0]); |
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@ -361,6 +522,30 @@ uint64_t pm_smc_handler(uint32_t smc_fid, uint64_t x1, uint64_t x2, uint64_t x3, |
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SMC_RET1(handle, (uint64_t)PM_RET_SUCCESS | |
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((uint64_t)ZYNQMP_TZ_VERSION << 32)); |
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case PM_SET_SUSPEND_MODE: |
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ret = pm_set_suspend_mode(pm_arg[0]); |
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SMC_RET1(handle, (uint64_t)ret); |
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case PM_SECURE_SHA: |
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ret = pm_sha_hash(pm_arg[0], pm_arg[1], pm_arg[2], |
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pm_arg[3]); |
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SMC_RET1(handle, (uint64_t)ret); |
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case PM_SECURE_RSA: |
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ret = pm_rsa_core(pm_arg[0], pm_arg[1], pm_arg[2], |
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pm_arg[3]); |
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SMC_RET1(handle, (uint64_t)ret); |
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case PM_SECURE_IMAGE: |
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{ |
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uint32_t result[2]; |
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ret = pm_secure_image(pm_arg[0], pm_arg[1], pm_arg[2], |
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pm_arg[3], &result[0]); |
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SMC_RET2(handle, (uint64_t)ret | ((uint64_t)result[0] << 32), |
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result[1]); |
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} |
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default: |
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WARN("Unimplemented PM Service Call: 0x%x\n", smc_fid); |
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SMC_RET1(handle, SMC_UNK); |
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danh-arm
7 years ago
GitHub