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The I2C controller on Allwinner SoCs after A31 has a inverted interrupt clear flag, which needs to be written 1 (rather than 0 on Marvell SoCs and old Allwinner SoCs) to clear. Add such a quirk to mi2cv driver common code. Signed-off-by: Icenowy Zheng <icenowy@aosc.io>pull/1534/head
Icenowy Zheng
6 years ago
1 changed files with 4 additions and 0 deletions
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