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@ -1,7 +1,7 @@ |
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/*
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* Copyright (c) 2018-2022, Arm Limited and Contributors. All rights reserved. |
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* Copyright (c) 2019-2022, Xilinx, Inc. All rights reserved. |
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* Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. |
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* Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved. |
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* |
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* SPDX-License-Identifier: BSD-3-Clause |
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*/ |
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@ -25,13 +25,11 @@ |
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#define CONSOLE_IS(con) (VERSAL_CONSOLE_ID_ ## con == VERSAL_CONSOLE) |
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/* List all supported platforms */ |
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#define VERSAL_PLATFORM_ID_versal_virt 1 |
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#define VERSAL_PLATFORM_ID_spp_itr6 2 |
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#define VERSAL_PLATFORM_ID_emu_itr6 3 |
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#define VERSAL_PLATFORM_ID_silicon 4 |
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#define VERSAL_PLATFORM_IS(con) (VERSAL_PLATFORM_ID_ ## con == VERSAL_PLATFORM) |
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/* List of platforms */ |
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#define VERSAL_SILICON U(0) |
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#define VERSAL_SPP U(1) |
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#define VERSAL_EMU U(2) |
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#define VERSAL_QEMU U(3) |
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/* Firmware Image Package */ |
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#define VERSAL_PRIMARY_CPU 0 |
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@ -75,27 +73,7 @@ |
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/*******************************************************************************
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* Platform related constants |
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******************************************************************************/ |
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#if VERSAL_PLATFORM_IS(versal_virt) |
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# define PLATFORM_NAME "Versal Virt" |
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# define UART_CLOCK 25000000 |
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# define UART_BAUDRATE 115200 |
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# define VERSAL_CPU_CLOCK 2720000 |
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#elif VERSAL_PLATFORM_IS(silicon) |
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# define PLATFORM_NAME "Versal Silicon" |
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# define UART_CLOCK 100000000 |
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# define UART_BAUDRATE 115200 |
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# define VERSAL_CPU_CLOCK 100000000 |
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#elif VERSAL_PLATFORM_IS(spp_itr6) |
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# define PLATFORM_NAME "SPP ITR6" |
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# define UART_CLOCK 25000000 |
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# define UART_BAUDRATE 115200 |
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# define VERSAL_CPU_CLOCK 2720000 |
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#elif VERSAL_PLATFORM_IS(emu_itr6) |
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# define PLATFORM_NAME "EMU ITR6" |
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# define UART_CLOCK 212000 |
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# define UART_BAUDRATE 9600 |
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# define VERSAL_CPU_CLOCK 212000 |
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#endif |
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#define UART_BAUDRATE 115200 |
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/* Access control register defines */ |
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#define ACTLR_EL3_L2ACTLR_BIT (1 << 6) |
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