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refactor(mediatek): partition MTK SiP SMC ID

Manage MTK SiP SMC ID with macros for 32/64 bit and
function declaration code generation.
Partition SMC ID with different exception level sources.

Signed-off-by: Leon Chen <leon.chen@mediatek.com>
Change-Id: I8966cd94f0d825e7ebae08833d2bd9fceedfd45e
pull/1988/head
Leon Chen 2 years ago
committed by Bo-Chen Chen
parent
commit
2f3f5939a1
  1. 2
      plat/mediatek/common/mtk_plat_common.c
  2. 61
      plat/mediatek/common/mtk_sip_svc.h
  3. 20
      plat/mediatek/include/mtk_sip_def.h
  4. 106
      plat/mediatek/include/mtk_sip_svc.h
  5. 3
      plat/mediatek/mt8173/platform.mk
  6. 5
      plat/mediatek/mt8183/platform.mk
  7. 4
      plat/mediatek/mt8186/plat_sip_calls.c
  8. 1
      plat/mediatek/mt8186/platform.mk
  9. 6
      plat/mediatek/mt8192/plat_sip_calls.c
  10. 3
      plat/mediatek/mt8192/platform.mk
  11. 6
      plat/mediatek/mt8195/plat_sip_calls.c
  12. 3
      plat/mediatek/mt8195/platform.mk

2
plat/mediatek/common/mtk_plat_common.c

@ -28,7 +28,7 @@ void clean_top_32b_of_param(uint32_t smc_fid,
u_register_t *px4) u_register_t *px4)
{ {
/* if parameters from SMC32. Clean top 32 bits */ /* if parameters from SMC32. Clean top 32 bits */
if (0 == (smc_fid & SMC_AARCH64_BIT)) { if (GET_SMC_CC(smc_fid) == SMC_64) {
*px1 = *px1 & SMC32_PARAM_MASK; *px1 = *px1 & SMC32_PARAM_MASK;
*px2 = *px2 & SMC32_PARAM_MASK; *px2 = *px2 & SMC32_PARAM_MASK;
*px3 = *px3 & SMC32_PARAM_MASK; *px3 = *px3 & SMC32_PARAM_MASK;

61
plat/mediatek/common/mtk_sip_svc.h

@ -1,61 +0,0 @@
/*
* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef MTK_SIP_SVC_H
#define MTK_SIP_SVC_H
#include <stdint.h>
/* SMC function IDs for SiP Service queries */
#define SIP_SVC_CALL_COUNT 0x8200ff00
#define SIP_SVC_UID 0x8200ff01
/* 0x8200ff02 is reserved */
#define SIP_SVC_VERSION 0x8200ff03
/* Mediatek SiP Service Calls version numbers */
#define MTK_SIP_SVC_VERSION_MAJOR 0x0
#define MTK_SIP_SVC_VERSION_MINOR 0x1
#define SMC_AARCH64_BIT 0x40000000
/* Number of Mediatek SiP Calls implemented */
#define MTK_COMMON_SIP_NUM_CALLS 4
/* Mediatek SiP Service Calls function IDs */
#define MTK_SIP_SET_AUTHORIZED_SECURE_REG 0x82000001
/* For MTK SMC from Secure OS */
/* 0x82000000 - 0x820000FF & 0xC2000000 - 0xC20000FF */
#define MTK_SIP_KERNEL_BOOT_AARCH32 0x82000200
#define MTK_SIP_KERNEL_BOOT_AARCH64 0xC2000200
/* VCORE */
#define MTK_SIP_VCORE_CONTROL_ARCH32 0x82000506
#define MTK_SIP_VCORE_CONTROL_ARCH64 0xC2000506
/* APUSYS SMC call */
#define MTK_SIP_APUSYS_CONTROL_AARCH32 0x8200051E
#define MTK_SIP_APUSYS_CONTROL_AARCH64 0xC200051E
/* Mediatek SiP Calls error code */
enum {
MTK_SIP_E_SUCCESS = 0,
MTK_SIP_E_INVALID_PARAM = -1,
MTK_SIP_E_NOT_SUPPORTED = -2,
MTK_SIP_E_INVALID_RANGE = -3,
MTK_SIP_E_PERMISSION_DENY = -4,
MTK_SIP_E_LOCK_FAIL = -5
};
/*
* This function should be implemented in Mediatek SOC directory. It fullfills
* MTK_SIP_SET_AUTHORIZED_SECURE_REG SiP call by checking the sreg with the
* predefined secure register list, if a match was found, set val to sreg.
*
* Return MTK_SIP_E_SUCCESS on success, and MTK_SIP_E_INVALID_PARAM on failure.
*/
uint64_t mt_sip_set_authorized_sreg(uint32_t sreg, uint32_t val);
#endif /* MTK_SIP_SVC_H */

20
plat/mediatek/include/mtk_sip_def.h

@ -0,0 +1,20 @@
/*
* Copyright (c) 2022, MediaTek Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef MTK_SIP_DEF_H
#define MTK_SIP_DEF_H
/* Define SiP SMC ID here */
#define MTK_SIP_SMC_FROM_NS_EL1_TABLE(_func) \
_func(MTK_SIP_KERNEL_TIME_SYNC, 0x202) \
_func(MTK_SIP_VCORE_CONTROL, 0x506) \
_func(MTK_SIP_APUSYS_CONTROL, 0x51E) \
_func(MTK_SIP_KERNEL_GIC_OP, 0x526)
#define MTK_SIP_SMC_FROM_BL33_TABLE(_func) \
_func(MTK_SIP_KERNEL_BOOT, 0x115)
#endif /* MTK_SIP_DEF_H */

106
plat/mediatek/include/mtk_sip_svc.h

@ -0,0 +1,106 @@
/*
* Copyright (c) 2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef MTK_SIP_SVC_H
#define MTK_SIP_SVC_H
#include <stdint.h>
#include <lib/smccc.h>
#include <mtk_sip_def.h>
/* SMC function IDs for SiP Service queries */
#define SIP_SVC_CALL_COUNT U(0x8200ff00)
#define SIP_SVC_UID U(0x8200ff01)
/* 0x8200ff02 is reserved */
#define SIP_SVC_VERSION U(0x8200ff03)
/* MediaTek SiP Service Calls version numbers */
#define MTK_SIP_SVC_VERSION_MAJOR U(0x0)
#define MTK_SIP_SVC_VERSION_MINOR U(0x1)
/* Number of MediaTek SiP Calls implemented */
#define MTK_COMMON_SIP_NUM_CALLS U(4)
/* MediaTek SiP Service Calls function IDs */
#define MTK_SIP_SET_AUTHORIZED_SECURE_REG U(0x82000001)
#define SMC_ID_EXPAND_AS_ENUM(_smc_id, _smc_num) \
_smc_id##_AARCH32 = ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT) | \
((0) << FUNCID_CC_SHIFT) | \
(OEN_SIP_START << FUNCID_OEN_SHIFT) | \
((_smc_num) << FUNCID_NUM_SHIFT)), \
_smc_id##_AARCH64 = ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT) | \
((1) << FUNCID_CC_SHIFT) | \
(OEN_SIP_START << FUNCID_OEN_SHIFT) | \
((_smc_num) << FUNCID_NUM_SHIFT)),
#define SMC_ID_EXPAND_AS_EXTERN_SMC_INDEX(_smc_id, _smc_num) \
extern short _smc_id##_descriptor_index;
/* Bind SMC handler with SMC ID */
#define DECLARE_SMC_HANDLER(_smc_id, _smc_handler) \
const struct smc_descriptor _smc_id##_descriptor \
__used \
__aligned(sizeof(void *)) \
__section(".mtk_smc_descriptor_pool") = { \
.smc_handler = _smc_handler, \
.smc_name = #_smc_id, \
.smc_id_aarch32 = _smc_id##_AARCH32, \
.smc_id_aarch64 = _smc_id##_AARCH64, \
.smc_descriptor_index = &_smc_id##_descriptor_index \
}
MTK_SIP_SMC_FROM_BL33_TABLE(SMC_ID_EXPAND_AS_EXTERN_SMC_INDEX);
MTK_SIP_SMC_FROM_NS_EL1_TABLE(SMC_ID_EXPAND_AS_EXTERN_SMC_INDEX);
/* Expand SiP SMC ID table as enum */
enum {
MTK_SIP_SMC_FROM_BL33_TABLE(SMC_ID_EXPAND_AS_ENUM)
MTK_SIP_SMC_FROM_NS_EL1_TABLE(SMC_ID_EXPAND_AS_ENUM)
MTK_SIP_SMC_MAX_NUMBER
};
/* MediaTek SiP Calls error code */
enum {
MTK_SIP_E_SUCCESS = 0,
MTK_SIP_E_INVALID_PARAM = -1,
MTK_SIP_E_NOT_SUPPORTED = -2,
MTK_SIP_E_INVALID_RANGE = -3,
MTK_SIP_E_PERMISSION_DENY = -4,
MTK_SIP_E_LOCK_FAIL = -5,
};
struct smccc_res {
uint64_t a1;
uint64_t a2;
uint64_t a3;
};
typedef uintptr_t (*smc_handler_t)(u_register_t,
u_register_t,
u_register_t,
u_register_t,
void *,
struct smccc_res *);
struct smc_descriptor {
smc_handler_t smc_handler;
const uint32_t smc_id_aarch32;
const uint32_t smc_id_aarch64;
const char *smc_name;
short *const smc_descriptor_index;
};
/*
* This function should be implemented in MediaTek SOC directory. It fullfills
* MTK_SIP_SET_AUTHORIZED_SECURE_REG SiP call by checking the sreg with the
* predefined secure register list, if a match was found, set val to sreg.
*
* Return MTK_SIP_E_SUCCESS on success, and MTK_SIP_E_INVALID_PARAM on failure.
*/
uint64_t mt_sip_set_authorized_sreg(uint32_t sreg, uint32_t val);
#endif /* MTK_SIP_SVC_H */

3
plat/mediatek/mt8173/platform.mk

@ -1,5 +1,5 @@
# #
# Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. # Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
# #
# SPDX-License-Identifier: BSD-3-Clause # SPDX-License-Identifier: BSD-3-Clause
# #
@ -8,6 +8,7 @@ MTK_PLAT := plat/mediatek
MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT} MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT}
PLAT_INCLUDES := -I${MTK_PLAT}/common/ \ PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
-I${MTK_PLAT}/include/ \
-Iinclude/plat/arm/common/aarch64 \ -Iinclude/plat/arm/common/aarch64 \
-I${MTK_PLAT_SOC}/drivers/crypt/ \ -I${MTK_PLAT_SOC}/drivers/crypt/ \
-I${MTK_PLAT_SOC}/drivers/mtcmos/ \ -I${MTK_PLAT_SOC}/drivers/mtcmos/ \

5
plat/mediatek/mt8183/platform.mk

@ -1,5 +1,5 @@
# #
# Copyright (c) 2019, MediaTek Inc. All rights reserved. # Copyright (c) 2019-2022, MediaTek Inc. All rights reserved.
# #
# SPDX-License-Identifier: BSD-3-Clause # SPDX-License-Identifier: BSD-3-Clause
# #
@ -8,7 +8,8 @@ MTK_PLAT := plat/mediatek
MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT} MTK_PLAT_SOC := ${MTK_PLAT}/${PLAT}
PLAT_INCLUDES := -I${MTK_PLAT}/common/ \ PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
-I${MTK_PLAT}/common/drivers/uart/ \ -I${MTK_PLAT}/common/drivers/uart/ \
-I${MTK_PLAT}/include/ \
-I${MTK_PLAT_SOC}/drivers/ \ -I${MTK_PLAT_SOC}/drivers/ \
-I${MTK_PLAT_SOC}/drivers/emi_mpu/ \ -I${MTK_PLAT_SOC}/drivers/emi_mpu/ \
-I${MTK_PLAT_SOC}/drivers/devapc/ \ -I${MTK_PLAT_SOC}/drivers/devapc/ \

4
plat/mediatek/mt8186/plat_sip_calls.c

@ -23,8 +23,8 @@ uintptr_t mediatek_plat_sip_handler(uint32_t smc_fid,
uint64_t ret; uint64_t ret;
switch (smc_fid) { switch (smc_fid) {
case MTK_SIP_VCORE_CONTROL_ARCH32: case MTK_SIP_VCORE_CONTROL_AARCH32:
case MTK_SIP_VCORE_CONTROL_ARCH64: case MTK_SIP_VCORE_CONTROL_AARCH64:
ret = spm_vcorefs_args(x1, x2, x3, (uint64_t *)&x4); ret = spm_vcorefs_args(x1, x2, x3, (uint64_t *)&x4);
SMC_RET2(handle, ret, x4); SMC_RET2(handle, ret, x4);
break; break;

1
plat/mediatek/mt8186/platform.mk

@ -13,6 +13,7 @@ PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
-I${MTK_PLAT}/common/drivers/uart/ \ -I${MTK_PLAT}/common/drivers/uart/ \
-I${MTK_PLAT}/common/drivers/timer/ \ -I${MTK_PLAT}/common/drivers/timer/ \
-I${MTK_PLAT}/common/lpm/ \ -I${MTK_PLAT}/common/lpm/ \
-I${MTK_PLAT}/include/ \
-I${MTK_PLAT_SOC}/drivers/spm/ \ -I${MTK_PLAT_SOC}/drivers/spm/ \
-I${MTK_PLAT_SOC}/drivers/dcm/ \ -I${MTK_PLAT_SOC}/drivers/dcm/ \
-I${MTK_PLAT_SOC}/drivers/dfd/ \ -I${MTK_PLAT_SOC}/drivers/dfd/ \

6
plat/mediatek/mt8192/plat_sip_calls.c

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2020, MediaTek Inc. All rights reserved. * Copyright (c) 2020-2022, MediaTek Inc. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -25,8 +25,8 @@ uintptr_t mediatek_plat_sip_handler(uint32_t smc_fid,
uint32_t rnd_val0 = 0U; uint32_t rnd_val0 = 0U;
switch (smc_fid) { switch (smc_fid) {
case MTK_SIP_VCORE_CONTROL_ARCH32: case MTK_SIP_VCORE_CONTROL_AARCH32:
case MTK_SIP_VCORE_CONTROL_ARCH64: case MTK_SIP_VCORE_CONTROL_AARCH64:
ret = spm_vcorefs_args(x1, x2, x3, (uint64_t *)&x4); ret = spm_vcorefs_args(x1, x2, x3, (uint64_t *)&x4);
SMC_RET2(handle, ret, x4); SMC_RET2(handle, ret, x4);
break; break;

3
plat/mediatek/mt8192/platform.mk

@ -1,5 +1,5 @@
# #
# Copyright (c) 2020, MediaTek Inc. All rights reserved. # Copyright (c) 2020-2022, MediaTek Inc. All rights reserved.
# #
# SPDX-License-Identifier: BSD-3-Clause # SPDX-License-Identifier: BSD-3-Clause
# #
@ -14,6 +14,7 @@ PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
-I${MTK_PLAT}/common/drivers/timer/ \ -I${MTK_PLAT}/common/drivers/timer/ \
-I${MTK_PLAT}/common/drivers/uart/ \ -I${MTK_PLAT}/common/drivers/uart/ \
-I${MTK_PLAT}/common/lpm/ \ -I${MTK_PLAT}/common/lpm/ \
-I${MTK_PLAT}/include/ \
-I${MTK_PLAT_SOC}/include/ \ -I${MTK_PLAT_SOC}/include/ \
-I${MTK_PLAT_SOC}/drivers/ \ -I${MTK_PLAT_SOC}/drivers/ \
-I${MTK_PLAT_SOC}/drivers/apusys/ \ -I${MTK_PLAT_SOC}/drivers/apusys/ \

6
plat/mediatek/mt8195/plat_sip_calls.c

@ -1,5 +1,5 @@
/* /*
* Copyright (c) 2020, MediaTek Inc. All rights reserved. * Copyright (c) 2020-2022, MediaTek Inc. All rights reserved.
* *
* SPDX-License-Identifier: BSD-3-Clause * SPDX-License-Identifier: BSD-3-Clause
*/ */
@ -32,8 +32,8 @@ uintptr_t mediatek_plat_sip_handler(uint32_t smc_fid,
ret = dp_secure_handler(x1, x2, &ret_val); ret = dp_secure_handler(x1, x2, &ret_val);
SMC_RET2(handle, ret, ret_val); SMC_RET2(handle, ret, ret_val);
break; break;
case MTK_SIP_VCORE_CONTROL_ARCH32: case MTK_SIP_VCORE_CONTROL_AARCH32:
case MTK_SIP_VCORE_CONTROL_ARCH64: case MTK_SIP_VCORE_CONTROL_AARCH64:
ret = spm_vcorefs_v2_args(x1, x2, x3, &x4); ret = spm_vcorefs_v2_args(x1, x2, x3, &x4);
SMC_RET2(handle, ret, x4); SMC_RET2(handle, ret, x4);
break; break;

3
plat/mediatek/mt8195/platform.mk

@ -1,5 +1,5 @@
# #
# Copyright (c) 2021, MediaTek Inc. All rights reserved. # Copyright (c) 2021-2022, MediaTek Inc. All rights reserved.
# #
# SPDX-License-Identifier: BSD-3-Clause # SPDX-License-Identifier: BSD-3-Clause
# #
@ -14,6 +14,7 @@ PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
-I${MTK_PLAT}/common/drivers/timer/ \ -I${MTK_PLAT}/common/drivers/timer/ \
-I${MTK_PLAT}/common/drivers/uart/ \ -I${MTK_PLAT}/common/drivers/uart/ \
-I${MTK_PLAT}/common/lpm/ \ -I${MTK_PLAT}/common/lpm/ \
-I${MTK_PLAT}/include/ \
-I${MTK_PLAT_SOC}/drivers/apusys/ \ -I${MTK_PLAT_SOC}/drivers/apusys/ \
-I${MTK_PLAT_SOC}/drivers/dcm \ -I${MTK_PLAT_SOC}/drivers/dcm \
-I${MTK_PLAT_SOC}/drivers/dfd \ -I${MTK_PLAT_SOC}/drivers/dfd \

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