From 31e703f99574a5a1edeadde611b031c422d5987c Mon Sep 17 00:00:00 2001 From: Aditya Angadi Date: Tue, 31 Dec 2019 14:23:53 +0530 Subject: [PATCH] drivers/arm/scmi: allow use of multiple SCMI channels On systems that have multiple platform components that can interpret the SCMI messages, there is a need to support multiple SCMI channels (one each to those platform components). Extend the existing SCMI interface that currently supports only a single SCMI channel to support multiple SCMI channels. Change-Id: Ice4062475b903aef3b5e5bc37df364c9778a62c5 Signed-off-by: Aditya Angadi --- drivers/arm/css/scp/css_pm_scmi.c | 140 ++++++++++++------ include/drivers/arm/css/scmi.h | 4 +- include/plat/arm/css/common/css_pm.h | 13 +- plat/arm/board/juno/include/platform_def.h | 3 + plat/arm/board/juno/juno_topology.c | 4 +- plat/arm/board/n1sdp/include/platform_def.h | 3 + plat/arm/board/n1sdp/n1sdp_bl31_setup.c | 4 +- .../css/sgi/include/sgi_base_platform_def.h | 3 + plat/arm/css/sgi/sgi_bl31_setup.c | 2 +- .../css/sgm/include/sgm_base_platform_def.h | 3 + plat/arm/css/sgm/sgm_bl31_setup.c | 4 +- 11 files changed, 125 insertions(+), 58 deletions(-) diff --git a/drivers/arm/css/scp/css_pm_scmi.c b/drivers/arm/css/scp/css_pm_scmi.c index b945cda78..097d2eb2b 100644 --- a/drivers/arm/css/scp/css_pm_scmi.c +++ b/drivers/arm/css/scp/css_pm_scmi.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -63,16 +63,44 @@ typedef enum { } scmi_power_state_t; /* - * The global handle for invoking the SCMI driver APIs after the driver + * The global handles for invoking the SCMI driver APIs after the driver * has been initialized. */ -static void *scmi_handle; +static void *scmi_handles[PLAT_ARM_SCMI_CHANNEL_COUNT]; -/* The SCMI channel global object */ -static scmi_channel_t channel; +/* The global SCMI channels array */ +static scmi_channel_t scmi_channels[PLAT_ARM_SCMI_CHANNEL_COUNT]; +/* + * Channel ID for the default SCMI channel. + * The default channel is used to issue SYSTEM level SCMI requests and is + * initialized to the channel which has the boot cpu as its resource. + */ +static uint32_t default_scmi_channel_id; + +/* + * TODO: Allow use of channel specific lock instead of using a single lock for + * all the channels. + */ ARM_SCMI_INSTANTIATE_LOCK; +/* + * Function to obtain the SCMI Domain ID and SCMI Channel number from the linear + * core position. The SCMI Channel number is encoded in the upper 16 bits and + * the Domain ID is encoded in the lower 16 bits in each entry of the mapping + * array exported by the platform. + */ +static void css_scp_core_pos_to_scmi_channel(unsigned int core_pos, + unsigned int *scmi_domain_id, unsigned int *scmi_channel_id) +{ + unsigned int composite_id; + + composite_id = plat_css_core_pos_to_scmi_dmn_id_map[core_pos]; + + *scmi_channel_id = GET_SCMI_CHANNEL_ID(composite_id); + *scmi_domain_id = GET_SCMI_DOMAIN_ID(composite_id); +} + /* * Helper function to suspend a CPU power domain and its parent power domains * if applicable. @@ -87,10 +115,10 @@ void css_scp_suspend(const struct psci_power_state *target_state) /* Check if power down at system power domain level is requested */ if (css_system_pwr_state(target_state) == ARM_LOCAL_STATE_OFF) { - /* Issue SCMI command for SYSTEM_SUSPEND */ - ret = scmi_sys_pwr_state_set(scmi_handle, - SCMI_SYS_PWR_FORCEFUL_REQ, - SCMI_SYS_PWR_SUSPEND); + /* Issue SCMI command for SYSTEM_SUSPEND on all SCMI channels */ + ret = scmi_sys_pwr_state_set( + scmi_handles[default_scmi_channel_id], + SCMI_SYS_PWR_FORCEFUL_REQ, SCMI_SYS_PWR_SUSPEND); if (ret != SCMI_E_SUCCESS) { ERROR("SCMI system power domain suspend return 0x%x unexpected\n", ret); @@ -99,7 +127,7 @@ void css_scp_suspend(const struct psci_power_state *target_state) return; } #if !HW_ASSISTED_COHERENCY - unsigned int lvl; + unsigned int lvl, channel_id, domain_id; uint32_t scmi_pwr_state = 0; /* * If we reach here, then assert that power down at system power domain @@ -127,9 +155,10 @@ void css_scp_suspend(const struct psci_power_state *target_state) SCMI_SET_PWR_STATE_MAX_PWR_LVL(scmi_pwr_state, lvl - 1); - ret = scmi_pwr_state_set(scmi_handle, - plat_css_core_pos_to_scmi_dmn_id_map[plat_my_core_pos()], - scmi_pwr_state); + css_scp_core_pos_to_scmi_channel(plat_my_core_pos(), + &domain_id, &channel_id); + ret = scmi_pwr_state_set(scmi_handles[channel_id], + domain_id, scmi_pwr_state); if (ret != SCMI_E_SUCCESS) { ERROR("SCMI set power state command return 0x%x unexpected\n", @@ -145,7 +174,7 @@ void css_scp_suspend(const struct psci_power_state *target_state) */ void css_scp_off(const struct psci_power_state *target_state) { - unsigned int lvl = 0; + unsigned int lvl = 0, channel_id, domain_id; int ret; uint32_t scmi_pwr_state = 0; @@ -168,10 +197,10 @@ void css_scp_off(const struct psci_power_state *target_state) SCMI_SET_PWR_STATE_MAX_PWR_LVL(scmi_pwr_state, lvl - 1); - ret = scmi_pwr_state_set(scmi_handle, - plat_css_core_pos_to_scmi_dmn_id_map[plat_my_core_pos()], - scmi_pwr_state); - + css_scp_core_pos_to_scmi_channel(plat_my_core_pos(), + &domain_id, &channel_id); + ret = scmi_pwr_state_set(scmi_handles[channel_id], + domain_id, scmi_pwr_state); if (ret != SCMI_E_QUEUED && ret != SCMI_E_SUCCESS) { ERROR("SCMI set power state command return 0x%x unexpected\n", ret); @@ -185,8 +214,8 @@ void css_scp_off(const struct psci_power_state *target_state) */ void css_scp_on(u_register_t mpidr) { - unsigned int lvl = 0; - int core_pos, ret; + unsigned int lvl = 0, channel_id, core_pos, domain_id; + int ret; uint32_t scmi_pwr_state = 0; for (; lvl <= PLAT_MAX_PWR_LVL; lvl++) @@ -196,13 +225,12 @@ void css_scp_on(u_register_t mpidr) SCMI_SET_PWR_STATE_MAX_PWR_LVL(scmi_pwr_state, lvl - 1); core_pos = plat_core_pos_by_mpidr(mpidr); - assert((core_pos >= 0) && - (((unsigned int)core_pos) < PLATFORM_CORE_COUNT)); - - ret = scmi_pwr_state_set(scmi_handle, - plat_css_core_pos_to_scmi_dmn_id_map[core_pos], - scmi_pwr_state); + assert(core_pos >= 0 && (core_pos < PLATFORM_CORE_COUNT)); + css_scp_core_pos_to_scmi_channel(core_pos, &domain_id, + &channel_id); + ret = scmi_pwr_state_set(scmi_handles[channel_id], + domain_id, scmi_pwr_state); if (ret != SCMI_E_QUEUED && ret != SCMI_E_SUCCESS) { ERROR("SCMI set power state command return 0x%x unexpected\n", ret); @@ -216,8 +244,9 @@ void css_scp_on(u_register_t mpidr) */ int css_scp_get_power_state(u_register_t mpidr, unsigned int power_level) { - int ret, cpu_idx; + int ret; uint32_t scmi_pwr_state = 0, lvl_state; + unsigned int channel_id, cpu_idx, domain_id; /* We don't support get power state at the system power domain level */ if ((power_level > PLAT_MAX_PWR_LVL) || @@ -230,9 +259,9 @@ int css_scp_get_power_state(u_register_t mpidr, unsigned int power_level) cpu_idx = plat_core_pos_by_mpidr(mpidr); assert(cpu_idx > -1); - ret = scmi_pwr_state_get(scmi_handle, - plat_css_core_pos_to_scmi_dmn_id_map[cpu_idx], - &scmi_pwr_state); + css_scp_core_pos_to_scmi_channel(cpu_idx, &domain_id, &channel_id); + ret = scmi_pwr_state_get(scmi_handles[channel_id], + domain_id, &scmi_pwr_state); if (ret != SCMI_E_SUCCESS) { WARN("SCMI get power state command return 0x%x unexpected\n", @@ -271,7 +300,7 @@ void __dead2 css_scp_system_off(int state) * Issue SCMI command. First issue a graceful * request and if that fails force the request. */ - ret = scmi_sys_pwr_state_set(scmi_handle, + ret = scmi_sys_pwr_state_set(scmi_handles[default_scmi_channel_id], SCMI_SYS_PWR_FORCEFUL_REQ, state); @@ -325,17 +354,28 @@ static int scmi_ap_core_init(scmi_channel_t *ch) void __init plat_arm_pwrc_setup(void) { - channel.info = plat_css_get_scmi_info(); - channel.lock = ARM_SCMI_LOCK_GET_INSTANCE; - scmi_handle = scmi_init(&channel); - if (scmi_handle == NULL) { - ERROR("SCMI Initialization failed\n"); - panic(); - } - if (scmi_ap_core_init(&channel) < 0) { - ERROR("SCMI AP core protocol initialization failed\n"); - panic(); + unsigned int composite_id, idx; + + for (idx = 0; idx < PLAT_ARM_SCMI_CHANNEL_COUNT; idx++) { + INFO("Initializing driver on Channel %d\n", idx); + + scmi_channels[idx].info = plat_css_get_scmi_info(idx); + scmi_channels[idx].lock = ARM_SCMI_LOCK_GET_INSTANCE; + scmi_handles[idx] = scmi_init(&scmi_channels[idx]); + + if (scmi_handles[idx] == NULL) { + ERROR("SCMI Initialization failed on channel %d\n", idx); + panic(); + } + + if (scmi_ap_core_init(&scmi_channels[idx]) < 0) { + ERROR("SCMI AP core protocol initialization failed\n"); + panic(); + } } + + composite_id = plat_css_core_pos_to_scmi_dmn_id_map[plat_my_core_pos()]; + default_scmi_channel_id = GET_SCMI_CHANNEL_ID(composite_id); } /****************************************************************************** @@ -347,6 +387,7 @@ const plat_psci_ops_t *css_scmi_override_pm_ops(plat_psci_ops_t *ops) { uint32_t msg_attr; int ret; + void *scmi_handle = scmi_handles[default_scmi_channel_id]; assert(scmi_handle); @@ -411,14 +452,17 @@ int css_system_reset2(int is_vendor, int reset_type, u_register_t cookie) #if PROGRAMMABLE_RESET_ADDRESS void plat_arm_program_trusted_mailbox(uintptr_t address) { - int ret; + int ret, i; - assert(scmi_handle); - ret = scmi_ap_core_set_reset_addr(scmi_handle, address, - SCMI_AP_CORE_LOCK_ATTR); - if (ret != SCMI_E_SUCCESS) { - ERROR("CSS: Failed to program reset address: %d\n", ret); - panic(); + for (i = 0; i < PLAT_ARM_SCMI_CHANNEL_COUNT; i++) { + assert(scmi_handles[i]); + + ret = scmi_ap_core_set_reset_addr(scmi_handles[i], address, + SCMI_AP_CORE_LOCK_ATTR); + if (ret != SCMI_E_SUCCESS) { + ERROR("CSS: Failed to program reset address: %d\n", ret); + panic(); + } } } #endif diff --git a/include/drivers/arm/css/scmi.h b/include/drivers/arm/css/scmi.h index 1f8dc6cce..e8a2863a9 100644 --- a/include/drivers/arm/css/scmi.h +++ b/include/drivers/arm/css/scmi.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -162,7 +162,7 @@ int scmi_ap_core_set_reset_addr(void *p, uint64_t reset_addr, uint32_t attr); int scmi_ap_core_get_reset_addr(void *p, uint64_t *reset_addr, uint32_t *attr); /* API to get the platform specific SCMI channel information. */ -scmi_channel_plat_info_t *plat_css_get_scmi_info(void); +scmi_channel_plat_info_t *plat_css_get_scmi_info(int channel_id); /* API to override default PSCI callbacks for platforms that support SCMI. */ const plat_psci_ops_t *css_scmi_override_pm_ops(plat_psci_ops_t *ops); diff --git a/include/plat/arm/css/common/css_pm.h b/include/plat/arm/css/common/css_pm.h index 93f86162e..e5357f50b 100644 --- a/include/plat/arm/css/common/css_pm.h +++ b/include/plat/arm/css/common/css_pm.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -44,4 +44,15 @@ int css_node_hw_state(u_register_t mpidr, unsigned int power_level); */ extern const uint32_t plat_css_core_pos_to_scmi_dmn_id_map[]; +#define SCMI_DOMAIN_ID_MASK U(0xFFFF) +#define SCMI_CHANNEL_ID_MASK U(0xFFFF) +#define SCMI_CHANNEL_ID_SHIFT U(16) + +#define SET_SCMI_CHANNEL_ID(n) (((n) & SCMI_CHANNEL_ID_MASK) << \ + SCMI_CHANNEL_ID_SHIFT) +#define SET_SCMI_DOMAIN_ID(n) ((n) & SCMI_DOMAIN_ID_MASK) +#define GET_SCMI_CHANNEL_ID(n) (((n) >> SCMI_CHANNEL_ID_SHIFT) & \ + SCMI_CHANNEL_ID_MASK) +#define GET_SCMI_DOMAIN_ID(n) ((n) & SCMI_DOMAIN_ID_MASK) + #endif /* CSS_PM_H */ diff --git a/plat/arm/board/juno/include/platform_def.h b/plat/arm/board/juno/include/platform_def.h index 998e0e3d2..eddd7e570 100644 --- a/plat/arm/board/juno/include/platform_def.h +++ b/plat/arm/board/juno/include/platform_def.h @@ -300,4 +300,7 @@ #define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32) #endif +/* Number of SCMI channels on the platform */ +#define PLAT_ARM_SCMI_CHANNEL_COUNT U(1) + #endif /* PLATFORM_DEF_H */ diff --git a/plat/arm/board/juno/juno_topology.c b/plat/arm/board/juno/juno_topology.c index 052ab9f8a..075f512c3 100644 --- a/plat/arm/board/juno/juno_topology.c +++ b/plat/arm/board/juno/juno_topology.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -20,7 +20,7 @@ static scmi_channel_plat_info_t juno_scmi_plat_info = { .ring_doorbell = &mhu_ring_doorbell, }; -scmi_channel_plat_info_t *plat_css_get_scmi_info(void) +scmi_channel_plat_info_t *plat_css_get_scmi_info(int channel_id) { return &juno_scmi_plat_info; } diff --git a/plat/arm/board/n1sdp/include/platform_def.h b/plat/arm/board/n1sdp/include/platform_def.h index e8b892145..cc07852c2 100644 --- a/plat/arm/board/n1sdp/include/platform_def.h +++ b/plat/arm/board/n1sdp/include/platform_def.h @@ -143,4 +143,7 @@ #define SBSA_SECURE_WDOG_BASE UL(0x2A480000) #define SBSA_SECURE_WDOG_TIMEOUT UL(100) +/* Number of SCMI channels on the platform */ +#define PLAT_ARM_SCMI_CHANNEL_COUNT U(1) + #endif /* PLATFORM_DEF_H */ diff --git a/plat/arm/board/n1sdp/n1sdp_bl31_setup.c b/plat/arm/board/n1sdp/n1sdp_bl31_setup.c index b150b8959..136287a8d 100644 --- a/plat/arm/board/n1sdp/n1sdp_bl31_setup.c +++ b/plat/arm/board/n1sdp/n1sdp_bl31_setup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -74,7 +74,7 @@ static uintptr_t n1sdp_multichip_gicr_frames[3] = { 0 }; -scmi_channel_plat_info_t *plat_css_get_scmi_info() +scmi_channel_plat_info_t *plat_css_get_scmi_info(int channel_id) { return &n1sdp_scmi_plat_info; } diff --git a/plat/arm/css/sgi/include/sgi_base_platform_def.h b/plat/arm/css/sgi/include/sgi_base_platform_def.h index 84f8d1eab..cc5ead844 100644 --- a/plat/arm/css/sgi/include/sgi_base_platform_def.h +++ b/plat/arm/css/sgi/include/sgi_base_platform_def.h @@ -239,4 +239,7 @@ #define SBSA_SECURE_WDOG_BASE UL(0x2A480000) #define SBSA_SECURE_WDOG_TIMEOUT UL(100) +/* Number of SCMI channels on the platform */ +#define PLAT_ARM_SCMI_CHANNEL_COUNT CSS_SGI_CHIP_COUNT + #endif /* SGI_BASE_PLATFORM_DEF_H */ diff --git a/plat/arm/css/sgi/sgi_bl31_setup.c b/plat/arm/css/sgi/sgi_bl31_setup.c index 2ff66ac75..3d2d933af 100644 --- a/plat/arm/css/sgi/sgi_bl31_setup.c +++ b/plat/arm/css/sgi/sgi_bl31_setup.c @@ -36,7 +36,7 @@ static scmi_channel_plat_info_t rd_n1e1_edge_scmi_plat_info = { .ring_doorbell = &mhuv2_ring_doorbell, }; -scmi_channel_plat_info_t *plat_css_get_scmi_info(void) +scmi_channel_plat_info_t *plat_css_get_scmi_info(int channel_id) { if (sgi_plat_info.platform_id == RD_N1E1_EDGE_SID_VER_PART_NUM) return &rd_n1e1_edge_scmi_plat_info; diff --git a/plat/arm/css/sgm/include/sgm_base_platform_def.h b/plat/arm/css/sgm/include/sgm_base_platform_def.h index 9cb642cfa..90511ac6a 100644 --- a/plat/arm/css/sgm/include/sgm_base_platform_def.h +++ b/plat/arm/css/sgm/include/sgm_base_platform_def.h @@ -238,4 +238,7 @@ /* System power domain level */ #define CSS_SYSTEM_PWR_DMN_LVL ARM_PWR_LVL2 +/* Number of SCMI channels on the platform */ +#define PLAT_ARM_SCMI_CHANNEL_COUNT U(1) + #endif /* SGM_BASE_PLATFORM_DEF_H */ diff --git a/plat/arm/css/sgm/sgm_bl31_setup.c b/plat/arm/css/sgm/sgm_bl31_setup.c index 7e92ac835..907e9fdac 100644 --- a/plat/arm/css/sgm/sgm_bl31_setup.c +++ b/plat/arm/css/sgm/sgm_bl31_setup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -20,7 +20,7 @@ static scmi_channel_plat_info_t sgm775_scmi_plat_info = { .ring_doorbell = &mhu_ring_doorbell, }; -scmi_channel_plat_info_t *plat_css_get_scmi_info() +scmi_channel_plat_info_t *plat_css_get_scmi_info(int channel_id) { return &sgm775_scmi_plat_info; }