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fix(n1sdp): fix spi_ids range for n1sdp multichip boot

According to GIC-600 TRM, it supports upto 960 SPIs.
This patch configures the SPI IDs range to 32-991, and distributes
them equally across both the chips.

Signed-off-by: sahil <sahil@arm.com>
Change-Id: I814cdadb59c8765c239ae0375e547718b7f208ff
pull/1999/head
sahil 1 year ago
parent
commit
31f60a9683
  1. 4
      plat/arm/board/n1sdp/n1sdp_bl31_setup.c

4
plat/arm/board/n1sdp/n1sdp_bl31_setup.c

@ -52,8 +52,8 @@ static struct gic600_multichip_data n1sdp_multichip_data __init = {
PLAT_ARM_GICD_BASE >> 16
},
.spi_ids = {
{PLAT_ARM_GICD_BASE, 32, 479},
{PLAT_ARM_GICD_BASE, 512, 959}
{PLAT_ARM_GICD_BASE, 32, 511},
{PLAT_ARM_GICD_BASE, 512, 991}
}
};

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