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This patch submits an RFC to refactor the context management mechanism in TF-A. Signed-off-by: Soby Mathew <soby.mathew@arm.com> Change-Id: Ia1ad5a85cb86c129e2feaf36bed123f0067c3965pull/1985/head
Soby Mathew
3 years ago
5 changed files with 198 additions and 0 deletions
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Enhance Context Management library for EL3 firmware |
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=================================================== |
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:Authors: Soby Mathew & Zelalem Aweke |
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:Organization: Arm Limited |
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:Contact: Soby Mathew <soby.mathew@arm.com> & Zelalem Aweke <zelalem.aweke@arm.com> |
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:Status: RFC |
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.. contents:: Table of Contents |
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Introduction |
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------------ |
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The context management library in TF-A provides the basic CPU context |
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initialization and management routines for use by different components |
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in EL3 firmware. The original design of the library was done keeping in |
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mind the 2 world switch and hence this design pattern has been extended to |
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keep up with growing requirements of EL3 firmware. With the introduction |
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of a new Realm world and a separate Root world for EL3 firmware, it is clear |
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that this library needs to be refactored to cater for future enhancements and |
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reduce chances of introducing error in code. This also aligns with the overall |
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goal of reducing EL3 firmware complexity and footprint. |
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It is expected that the suggestions below could have legacy implications and |
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hence we are mainly targeting SPM/RMM based systems. It is expected that these |
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legacy issues will need to be sorted out as part of implementation on a case |
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by case basis. |
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Design Principles |
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----------------- |
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The below section lays down the design principles for re-factoring the context |
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management library : |
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(1) **Decentralized model for context mgmt** |
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Both the Secure and Realm worlds have associated dispatcher component in |
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EL3 firmware to allow management of their respective worlds. Allowing the |
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dispatcher to own the context for their respective world and moving away |
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from a centralized policy management by context management library will |
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remove the world differentiation code in the library. This also means that |
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the library will not be responsible for CPU feature enablement for |
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Secure and Realm worlds. See point 3 and 4 for more details. |
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The Non Secure world does not have a dispatcher component and hence EL3 |
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firmware (BL31)/context management library needs to have routines to help |
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initialize the Non Secure world context. |
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(2) **EL3 should only initialize immediate used lower EL** |
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Due to the way TF-A evolved, from EL3 interacting with an S-EL1 payload to |
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SPM in S-EL2, there is some code initializing S-EL1 registers which is |
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probably redundant when SPM is present in S-EL2. As a principle, EL3 |
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firmware should only initialize the next immediate lower EL in use. |
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If EL2 needs to be skipped and is not to be used at runtime, then |
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EL3 can do the bare minimal EL2 init and init EL1 to prepare for EL3 exit. |
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It is expected that this skip EL2 configuration is only needed for NS |
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world to support legacy Android deployments. It is worth removing this |
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`skip EL2 for Non Secure` config support if this is no longer used. |
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(3) **Maintain EL3 sysregs which affect lower EL within CPU context** |
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The CPU context contains some EL3 sysregs and gets applied on a per-world |
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basis (eg: cptr_el3, scr_el3, zcr_el3 is part of the context |
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because different settings need to be applied between each world). |
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But this design pattern is not enforced in TF-A. It is possible to directly |
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modify EL3 sysreg dynamically during the transition between NS and Secure |
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worlds. Having multiple ways of manipulating EL3 sysregs for different |
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values between the worlds is flaky and error prone. The proposal is to |
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enforce the rule that any EL3 sysreg which can be different between worlds |
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is maintained in the CPU Context. Once the context is initialized the |
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EL3 sysreg values corresponding to the world being entered will be restored. |
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(4) **Allow more flexibility for Dispatchers to select feature set to save and restore** |
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The current functions for EL2 CPU context save and restore is a single |
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function which takes care of saving and restoring all the registers for |
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EL2. This method is inflexible and it does not allow to dynamically detect |
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CPU features to select registers to save and restore. It also assumes that |
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both Realm and Secure world will have the same feature set enabled from |
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EL3 at runtime and makes it hard to enable different features for each |
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world. The framework should cater for selective save and restore of CPU |
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registers which can be controlled by the dispatcher. |
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For the implementation, this could mean that there is a separate assembly |
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save and restore routine corresponding to Arch feature. The memory allocation |
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within the CPU Context for each set of registers will be controlled by a |
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FEAT_xxx build option. It is a valid configuration to have |
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context memory allocated but not used at runtime based on feature detection |
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at runtime or the platform owner has decided not to enable the feature |
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for the particular world. |
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Context Allocation and Initialization |
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------------------------------------- |
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|context_mgmt_abs| |
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.. |context_mgmt_abs| image:: |
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../resources/diagrams/context_management_abs.png |
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The above figure shows how the CPU context is allocated within TF-A. The |
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allocation for Secure and Realm world is by the respective dispatcher. In the case |
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of NS world, the context is allocated by the PSCI lib. This scheme allows TF-A |
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to be built in various configurations (with or without Secure/Realm worlds) and |
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will result in optimal memory footprint. The Secure and Realm world contexts are |
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initialized by invoking context management library APIs which then initialize |
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each world based on conditional evaluation of the security state of the |
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context. The proposal here is to move the conditional initialization |
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of context for Secure and Realm worlds to their respective dispatchers and |
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have the library do only the common init needed. The library can export |
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helpers to initialize registers corresponding to certain features but |
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should not try to do different initialization between the worlds. The library |
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can also export helpers for initialization of NS CPU Context since there is no |
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dispatcher for that world. |
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This implies that any world specific code in context mgmt lib should now be |
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migrated to the respective "owners". To maintain compatibility with legacy, the |
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current functions can be retained in the lib and perhaps define new ones for |
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use by SPMD and RMMD. The details of this can be worked out during |
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implementation. |
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Introducing Root Context |
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------------------------ |
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Till now, we have been ignoring the fact that Root world (or EL3) itself could |
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have some settings which are distinct from NS/S/Realm worlds. In this case, |
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Root world itself would need to maintain some sysregs settings for its own |
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execution and would need to use sysregs of lower EL (eg: PAuth, pmcr) to enable |
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some functionalities in EL3. The current sequence for context save and restore |
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in TF-A is as given below: |
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|context_mgmt_existing| |
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.. |context_mgmt_existing| image:: |
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../resources/diagrams/context_mgmt_existing.png |
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Note1: The EL3 CPU context is not a homogenous collection of EL3 sysregs but |
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a collection of EL3 and some other lower EL registers. The save and restore |
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is also not done homogenously but based on the objective of using the |
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particular register. |
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Note2: The EL1 context save and restore can possibly be removed when switching |
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to S-EL2 as SPM can take care of saving the incoming NS EL1 context. |
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It can be seen that the EL3 sysreg values applied while the execution is in Root |
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world corresponds to the world it came from (eg: if entering EL3 from NS world, |
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the sysregs correspond to the values in NS context). There is a case that EL3 |
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itself may have some settings to apply for various reasons. A good example for |
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this is the cptr_el3 regsiter. Although FPU traps need to be disabled for |
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Non Secure, Secure and Realm worlds, the EL3 execution itself may keep the trap |
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enabled for the sake of robustness. Another example is, if the MTE feature |
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is enabled for a particular world, this feature will be enabled for Root world |
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as well when entering EL3 from that world. The firmware at EL3 may not |
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be expecting this feature to be enabled and may cause unwanted side-effects |
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which could be problematic. Thus it would be more robust if Root world is not |
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subject to EL3 sysreg values from other worlds but maintains its own values |
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which is stable and predictable throughout root world execution. |
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There is also the case that when EL3 would like to make use of some |
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Architectural feature(s) or do some security hardening, it might need |
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programming of some lower EL sysregs. For example, if EL3 needs to make |
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use of Pointer Authentication (PAuth) feature, it needs to program |
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its own PAuth Keys during execution at EL3. Hence EL3 needs its |
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own copy of PAuth registers which needs to be restored on every |
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entry to EL3. A similar case can be made for DIT bit in PSTATE, |
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or use of SP_EL0 for C Runtime Stack at EL3. |
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The proposal here is to maintain a separate root world CPU context |
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which gets applied for Root world execution. This is not the full |
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CPU_Context, but subset of EL3 sysregs (`el3_sysreg`) and lower EL |
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sysregs (`root_exc_context`) used by EL3. The save and restore |
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sequence for this Root context would need to be done in |
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an optimal way. The `el3_sysreg` does not need to be saved |
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on EL3 Exit and possibly only some registers in `root_exc_context` |
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of Root world context would need to be saved on EL3 exit (eg: SP_EL0). |
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The new sequence for world switch including Root world context would |
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be as given below : |
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|context_mgmt_proposed| |
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.. |context_mgmt_proposed| image:: |
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../resources/diagrams/context_mgmt_proposed.png |
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Having this framework in place will allow Root world to make use of lower EL |
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registers easily for its own purposes and also have a fixed EL3 sysreg setting |
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which is not affected by the settings of other worlds. This will unify the |
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Root world register usage pattern for its own execution and remove some |
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of the adhoc usages in code. |
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Conclusion |
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---------- |
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Of all the proposals, the introduction of Root world context would likely need |
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further prototyping to confirm the design and we will need to measure the |
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performance and memory impact of this change. Other changes are incremental |
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improvements which are thought to have negligible impact on EL3 performance. |
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-------------- |
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*Copyright (c) 2022, Arm Limited and Contributors. All rights reserved.* |
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