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@ -1,5 +1,5 @@ |
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/*
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* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. |
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. |
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* |
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* SPDX-License-Identifier: BSD-3-Clause |
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*/ |
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@ -10,17 +10,17 @@ |
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/* Inline register access functions */ |
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static inline void sp805_write_wdog_load(uintptr_t base, unsigned long value) |
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static inline void sp805_write_wdog_load(uintptr_t base, uint32_t value) |
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{ |
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mmio_write_32(base + SP805_WDOG_LOAD_OFF, value); |
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} |
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static inline void sp805_write_wdog_ctrl(uintptr_t base, unsigned long value) |
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static inline void sp805_write_wdog_ctrl(uintptr_t base, uint32_t value) |
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{ |
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mmio_write_32(base + SP805_WDOG_CTR_OFF, value); |
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} |
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static inline void sp805_write_wdog_lock(uintptr_t base, unsigned long value) |
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static inline void sp805_write_wdog_lock(uintptr_t base, uint32_t value) |
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{ |
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mmio_write_32(base + SP805_WDOG_LOCK_OFF, value); |
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} |
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@ -28,23 +28,23 @@ static inline void sp805_write_wdog_lock(uintptr_t base, unsigned long value) |
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/* Public API implementation */ |
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void sp805_start(uintptr_t base, unsigned long ticks) |
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void sp805_start(uintptr_t base, unsigned int ticks) |
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{ |
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sp805_write_wdog_load(base, ticks); |
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sp805_write_wdog_ctrl(base, SP805_CTR_RESEN | SP805_CTR_INTEN); |
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/* Lock registers access */ |
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sp805_write_wdog_lock(base, 0); |
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sp805_write_wdog_lock(base, 0U); |
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} |
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void sp805_stop(uintptr_t base) |
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{ |
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sp805_write_wdog_lock(base, WDOG_UNLOCK_KEY); |
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sp805_write_wdog_ctrl(base, 0); |
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sp805_write_wdog_ctrl(base, 0U); |
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} |
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void sp805_refresh(uintptr_t base, unsigned long ticks) |
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void sp805_refresh(uintptr_t base, unsigned int ticks) |
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{ |
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sp805_write_wdog_lock(base, WDOG_UNLOCK_KEY); |
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sp805_write_wdog_load(base, ticks); |
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sp805_write_wdog_lock(base, 0); |
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sp805_write_wdog_lock(base, 0U); |
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} |
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