diff --git a/plat/qti/common/inc/qti_plat.h b/plat/qti/common/inc/qti_plat.h index d616efe13..7483c4945 100644 --- a/plat/qti/common/inc/qti_plat.h +++ b/plat/qti/common/inc/qti_plat.h @@ -54,4 +54,9 @@ void gic_set_spi_routing(unsigned int id, unsigned int irm, u_register_t mpidr); void qti_pmic_prepare_reset(void); void qti_pmic_prepare_shutdown(void); +typedef struct chip_id_info { + uint16_t jtag_id; + uint16_t chipinfo_id; +} chip_id_info_t; + #endif /* QTI_PLAT_H */ diff --git a/plat/qti/common/src/qti_common.c b/plat/qti/common/src/qti_common.c index 88217311c..74ccb5b41 100644 --- a/plat/qti/common/src/qti_common.c +++ b/plat/qti/common/src/qti_common.c @@ -17,6 +17,7 @@ #include #include +#include #include #include @@ -154,9 +155,22 @@ int qti_mmap_remove_dynamic_region(uintptr_t base_va, size_t size) */ int32_t plat_get_soc_version(void) { - uint32_t soc_version = (QTI_SOC_VERSION & QTI_SOC_VERSION_MASK); + int i = 0; + /* Variant other than in mapped g_map_jtag_chipinfo_id variable will have + * default chipinfo id as 0xFFFF + */ + uint32_t soc_version = (QTI_DEFAULT_CHIPINFO_ID & QTI_SOC_VERSION_MASK); uint32_t jep106az_code = (JEDEC_QTI_BKID << QTI_SOC_CONTINUATION_SHIFT) | (JEDEC_QTI_MFID << QTI_SOC_IDENTIFICATION_SHIFT); + uint32_t jtag_id = mmio_read_32(QTI_JTAG_ID_REG); + uint32_t jtag_id_val = (jtag_id >> QTI_JTAG_ID_SHIFT) + & QTI_SOC_VERSION_MASK; + + for (i = 0; i < ARRAY_SIZE(g_map_jtag_chipinfo_id); i++) { + if (g_map_jtag_chipinfo_id[i].jtag_id == jtag_id_val) + soc_version = g_map_jtag_chipinfo_id[i].chipinfo_id + & QTI_SOC_VERSION_MASK; + } return (int32_t)(jep106az_code | (soc_version)); } diff --git a/plat/qti/sc7180/inc/platform_def.h b/plat/qti/sc7180/inc/platform_def.h index e3dc81108..b69dfd95b 100644 --- a/plat/qti/sc7180/inc/platform_def.h +++ b/plat/qti/sc7180/inc/platform_def.h @@ -185,7 +185,6 @@ /*----------------------------------------------------------------------------*/ /* SOC hw version register */ /*----------------------------------------------------------------------------*/ -#define QTI_SOC_VERSION U(0x7180) #define QTI_SOC_VERSION_MASK U(0xFFFF) #define QTI_SOC_REVISION_REG 0x1FC8000 #define QTI_SOC_REVISION_MASK U(0xFFFF) diff --git a/plat/qti/sc7180/inc/qti_map_chipinfo.h b/plat/qti/sc7180/inc/qti_map_chipinfo.h new file mode 100644 index 000000000..4ab6191db --- /dev/null +++ b/plat/qti/sc7180/inc/qti_map_chipinfo.h @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#ifndef QTI_MAP_CHIPINFO_H +#define QTI_MAP_CHIPINFO_H + +#include + +#include + +#define QTI_JTAG_ID_REG 0x786130 +#define QTI_SOC_VERSION_MASK U(0xFFFF) +#define QTI_SOC_REVISION_REG 0x1FC8000 +#define QTI_SOC_REVISION_MASK U(0xFFFF) +#define QTI_JTAG_ID_SHIFT 12 +#define QTI_JTAG_ID_SC7180 U(0x012C) +#define QTI_JTAG_ID_SC7180P U(0x0195) +#define QTI_CHIPINFO_ID_SC7180 U(0x01A9) +#define QTI_CHIPINFO_ID_SC7180P U(0x01EF) +#define QTI_DEFAULT_CHIPINFO_ID U(0xFFFF) + +static const chip_id_info_t g_map_jtag_chipinfo_id[] = { + {QTI_JTAG_ID_SC7180, QTI_CHIPINFO_ID_SC7180}, + {QTI_JTAG_ID_SC7180P, QTI_CHIPINFO_ID_SC7180P}, +}; +#endif /* QTI_MAP_CHIPINFO_H */ diff --git a/plat/qti/sc7280/inc/platform_def.h b/plat/qti/sc7280/inc/platform_def.h index da7eddc7a..48b48acf9 100644 --- a/plat/qti/sc7280/inc/platform_def.h +++ b/plat/qti/sc7280/inc/platform_def.h @@ -185,7 +185,6 @@ /*----------------------------------------------------------------------------*/ /* SOC hw version register */ /*----------------------------------------------------------------------------*/ -#define QTI_SOC_VERSION U(0x7280) #define QTI_SOC_VERSION_MASK U(0xFFFF) #define QTI_SOC_REVISION_REG 0x1FC8000 #define QTI_SOC_REVISION_MASK U(0xFFFF) diff --git a/plat/qti/sc7280/inc/qti_map_chipinfo.h b/plat/qti/sc7280/inc/qti_map_chipinfo.h new file mode 100644 index 000000000..7303e2088 --- /dev/null +++ b/plat/qti/sc7280/inc/qti_map_chipinfo.h @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#ifndef QTI_MAP_CHIPINFO_H +#define QTI_MAP_CHIPINFO_H + +#include + +#include + +#define QTI_JTAG_ID_REG 0x786130 +#define QTI_JTAG_ID_SHIFT 12 +#define QTI_JTAG_ID_SC7280 U(0x0193) +#define QTI_JTAG_ID_SC7280P U(0x01EB) +#define QTI_JTAG_ID_SC8270 U(0x01E3) +#define QTI_JTAG_ID_SC8270P U(0x020A) +#define QTI_JTAG_ID_SC7270P U(0x0215) +#define QTI_CHIPINFO_ID_SC7280 U(0x01E7) +#define QTI_CHIPINFO_ID_SC7280P U(0x0222) +#define QTI_CHIPINFO_ID_SC8270 U(0x0229) +#define QTI_CHIPINFO_ID_SC8270P U(0x0233) +#define QTI_CHIPINFO_ID_SC7270P U(0x0237) +#define QTI_DEFAULT_CHIPINFO_ID U(0xFFFF) + +static const chip_id_info_t g_map_jtag_chipinfo_id[] = { + {QTI_JTAG_ID_SC7280, QTI_CHIPINFO_ID_SC7280}, + {QTI_JTAG_ID_SC7280P, QTI_CHIPINFO_ID_SC7280P}, + {QTI_JTAG_ID_SC8270, QTI_CHIPINFO_ID_SC8270}, + {QTI_JTAG_ID_SC8270P, QTI_CHIPINFO_ID_SC8270P}, + {QTI_JTAG_ID_SC7270P, QTI_CHIPINFO_ID_SC7270P}, +}; +#endif /* QTI_MAP_CHIPINFO_H */