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marvell/a3700: Prevent SError accessing PCIe link while it is down

When the link goes down (e.g. during a retrain), accessing the device
configuration space can trigger an ARM64 SError interrupt. Such
conditions cannot be predicted, so to avoid a crash the SError is
ignored.

Signed-off-by: Remi Pommarel <repk@triplefau.lt>
Change-Id: I2b1fd3296cc1c88b9ca1fe21c0924cb324eed58d
pull/1931/head
Remi Pommarel 5 years ago
parent
commit
3c7dcdac5c
  1. 2
      plat/marvell/a3700/common/a3700_common.mk
  2. 23
      plat/marvell/a3700/common/a3700_ea.c

2
plat/marvell/a3700/common/a3700_common.mk

@ -13,6 +13,7 @@ PLAT_INCLUDE_BASE := $(MARVELL_PLAT_INCLUDE_BASE)/$(PLAT_FAMILY)
PLAT_COMMON_BASE := $(PLAT_FAMILY_BASE)/common
MARVELL_DRV_BASE := drivers/marvell
MARVELL_COMMON_BASE := $(MARVELL_PLAT_BASE)/common
HANDLE_EA_EL3_FIRST := 1
include $(MARVELL_PLAT_BASE)/marvell.mk
@ -107,6 +108,7 @@ BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \
$(PLAT_COMMON_BASE)/dram_win.c \
$(PLAT_COMMON_BASE)/io_addr_dec.c \
$(PLAT_COMMON_BASE)/marvell_plat_config.c \
$(PLAT_COMMON_BASE)/a3700_ea.c \
$(PLAT_FAMILY_BASE)/$(PLAT)/plat_bl31_setup.c \
$(MARVELL_COMMON_BASE)/marvell_ddr_info.c \
$(MARVELL_COMMON_BASE)/marvell_gicv3.c \

23
plat/marvell/a3700/common/a3700_ea.c

@ -0,0 +1,23 @@
/*
* Copyright (C) 2019 Repk repk@triplefau.lt
*
* SPDX-License-Identifier: BSD-3-Clause
* https://spdx.org/licenses
*/
#include <common/bl_common.h>
#include <common/debug.h>
#include <arch_helpers.h>
#define ADVK_SERROR_SYNDROME 0xbf000002
void plat_ea_handler(unsigned int ea_reason, uint64_t syndrome, void *cookie,
void *handle, uint64_t flags)
{
if (syndrome != ADVK_SERROR_SYNDROME) {
ERROR("Unhandled External Abort received on 0x%lx at EL3!\n",
read_mpidr_el1());
ERROR(" exception reason=%u syndrome=0x%llx\n", ea_reason,
syndrome);
panic();
}
}
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