From 3f7b1490dc0022ea10e2c0c0e26f4ab8dad56846 Mon Sep 17 00:00:00 2001 From: Hadi Asyrafi Date: Thu, 1 Aug 2019 14:48:39 +0800 Subject: [PATCH] intel: Platform common code refactor Pull out common code from aarch64 and include Signed-off-by: Hadi Asyrafi Change-Id: I4d0f5e1bb01bcdacbedf8e6c359de594239b645f --- plat/intel/soc/agilex/include/platform_def.h | 2 +- plat/intel/soc/agilex/platform.mk | 7 +- plat/intel/soc/agilex/socfpga_psci.c | 2 +- .../{agilex => common}/aarch64/plat_helpers.S | 4 +- .../aarch64/platform_common.c | 0 .../{agilex => common}/include/plat_macros.S | 0 .../include/socfpga_private.h | 0 .../soc/stratix10/aarch64/plat_helpers.S | 121 ------------------ .../soc/stratix10/aarch64/platform_common.c | 57 --------- plat/intel/soc/stratix10/bl2_plat_setup.c | 6 +- plat/intel/soc/stratix10/bl31_plat_setup.c | 3 +- .../intel/soc/stratix10/include/plat_macros.S | 22 ---- .../stratix10/{ => include}/platform_def.h | 2 +- .../soc/stratix10/include/platform_private.h | 41 ------ .../{aarch64 => include}/stratix10_private.h | 0 plat/intel/soc/stratix10/plat_psci.c | 3 +- plat/intel/soc/stratix10/plat_storage.c | 2 +- plat/intel/soc/stratix10/platform.mk | 12 +- .../soc/stratix10/soc/s10_clock_manager.c | 1 - plat/intel/soc/stratix10/soc/s10_handoff.c | 1 - .../soc/stratix10/soc/s10_reset_manager.c | 1 - 21 files changed, 21 insertions(+), 266 deletions(-) rename plat/intel/soc/{agilex => common}/aarch64/plat_helpers.S (97%) rename plat/intel/soc/{agilex => common}/aarch64/platform_common.c (100%) rename plat/intel/soc/{agilex => common}/include/plat_macros.S (100%) rename plat/intel/soc/{agilex => common}/include/socfpga_private.h (100%) delete mode 100644 plat/intel/soc/stratix10/aarch64/plat_helpers.S delete mode 100644 plat/intel/soc/stratix10/aarch64/platform_common.c delete mode 100644 plat/intel/soc/stratix10/include/plat_macros.S rename plat/intel/soc/stratix10/{ => include}/platform_def.h (99%) delete mode 100644 plat/intel/soc/stratix10/include/platform_private.h rename plat/intel/soc/stratix10/{aarch64 => include}/stratix10_private.h (100%) diff --git a/plat/intel/soc/agilex/include/platform_def.h b/plat/intel/soc/agilex/include/platform_def.h index 10f733864..277862a30 100644 --- a/plat/intel/soc/agilex/include/platform_def.h +++ b/plat/intel/soc/agilex/include/platform_def.h @@ -15,7 +15,7 @@ #define PLAT_CPUID_RELEASE 0xffe1b000 -#define PLAT_AGX_SEC_ENTRY 0xffe1b008 +#define PLAT_SEC_ENTRY 0xffe1b008 /* Define next boot image name and offset */ #define PLAT_NS_IMAGE_OFFSET 0x50000 diff --git a/plat/intel/soc/agilex/platform.mk b/plat/intel/soc/agilex/platform.mk index c13709a6e..5d20462b7 100644 --- a/plat/intel/soc/agilex/platform.mk +++ b/plat/intel/soc/agilex/platform.mk @@ -7,7 +7,8 @@ # PLAT_INCLUDES := \ -Iplat/intel/soc/agilex/include/ \ - -Iplat/intel/soc/common/drivers/ + -Iplat/intel/soc/common/drivers/ \ + -Iplat/intel/soc/common/include/ PLAT_BL_COMMON_SOURCES := \ drivers/arm/gic/common/gic_common.c \ @@ -19,8 +20,8 @@ PLAT_BL_COMMON_SOURCES := \ lib/xlat_tables/aarch64/xlat_tables.c \ lib/xlat_tables/xlat_tables_common.c \ plat/common/plat_gicv2.c \ - plat/intel/soc/agilex/aarch64/platform_common.c \ - plat/intel/soc/agilex/aarch64/plat_helpers.S \ + plat/intel/soc/common/aarch64/platform_common.c \ + plat/intel/soc/common/aarch64/plat_helpers.S BL2_SOURCES += \ common/desc_image_load.c \ diff --git a/plat/intel/soc/agilex/socfpga_psci.c b/plat/intel/soc/agilex/socfpga_psci.c index 411e89bdd..04d8a0e91 100644 --- a/plat/intel/soc/agilex/socfpga_psci.c +++ b/plat/intel/soc/agilex/socfpga_psci.c @@ -17,7 +17,7 @@ #define AGX_RSTMGR_OFST 0xffd11000 #define AGX_RSTMGR_MPUMODRST_OFST 0x20 -uintptr_t *agilex_sec_entry = (uintptr_t *) PLAT_AGX_SEC_ENTRY; +uintptr_t *agilex_sec_entry = (uintptr_t *) PLAT_SEC_ENTRY; uintptr_t *cpuid_release = (uintptr_t *) PLAT_CPUID_RELEASE; /******************************************************************************* diff --git a/plat/intel/soc/agilex/aarch64/plat_helpers.S b/plat/intel/soc/common/aarch64/plat_helpers.S similarity index 97% rename from plat/intel/soc/agilex/aarch64/plat_helpers.S rename to plat/intel/soc/common/aarch64/plat_helpers.S index b3f5a5eab..00fe2d999 100644 --- a/plat/intel/soc/agilex/aarch64/plat_helpers.S +++ b/plat/intel/soc/common/aarch64/plat_helpers.S @@ -34,7 +34,7 @@ func plat_secondary_cold_boot_setup poll_mailbox: wfi - mov_imm x0, PLAT_AGX_SEC_ENTRY + mov_imm x0, PLAT_SEC_ENTRY ldr x1, [x0] mov_imm x2, PLAT_CPUID_RELEASE ldr x3, [x2] @@ -66,7 +66,7 @@ func plat_my_core_pos endfunc plat_my_core_pos func plat_get_my_entrypoint - mov_imm x1, PLAT_AGX_SEC_ENTRY + mov_imm x1, PLAT_SEC_ENTRY ldr x0, [x1] ret endfunc plat_get_my_entrypoint diff --git a/plat/intel/soc/agilex/aarch64/platform_common.c b/plat/intel/soc/common/aarch64/platform_common.c similarity index 100% rename from plat/intel/soc/agilex/aarch64/platform_common.c rename to plat/intel/soc/common/aarch64/platform_common.c diff --git a/plat/intel/soc/agilex/include/plat_macros.S b/plat/intel/soc/common/include/plat_macros.S similarity index 100% rename from plat/intel/soc/agilex/include/plat_macros.S rename to plat/intel/soc/common/include/plat_macros.S diff --git a/plat/intel/soc/agilex/include/socfpga_private.h b/plat/intel/soc/common/include/socfpga_private.h similarity index 100% rename from plat/intel/soc/agilex/include/socfpga_private.h rename to plat/intel/soc/common/include/socfpga_private.h diff --git a/plat/intel/soc/stratix10/aarch64/plat_helpers.S b/plat/intel/soc/stratix10/aarch64/plat_helpers.S deleted file mode 100644 index f077cf324..000000000 --- a/plat/intel/soc/stratix10/aarch64/plat_helpers.S +++ /dev/null @@ -1,121 +0,0 @@ -/* - * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include - - .globl plat_secondary_cold_boot_setup - .globl platform_is_primary_cpu - .globl plat_is_my_cpu_primary - .globl plat_my_core_pos - .globl plat_crash_console_init - .globl plat_crash_console_putc - .globl plat_crash_console_flush - .globl platform_mem_init - - .globl plat_get_my_entrypoint - - /* ----------------------------------------------------- - * void plat_secondary_cold_boot_setup (void); - * - * This function performs any platform specific actions - * needed for a secondary cpu after a cold reset e.g - * mark the cpu's presence, mechanism to place it in a - * holding pen etc. - * ----------------------------------------------------- - */ -func plat_secondary_cold_boot_setup - /* Wait until the it gets reset signal from rstmgr gets populated */ -poll_mailbox: - wfi - - mov_imm x0, PLAT_S10_SEC_ENTRY - ldr x1, [x0] - mov_imm x2, PLAT_CPUID_RELEASE - ldr x3, [x2] - mrs x4, mpidr_el1 - and x4, x4, #0xff - cmp x3, x4 - b.ne poll_mailbox - br x1 -endfunc plat_secondary_cold_boot_setup - -func platform_is_primary_cpu - and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK) - cmp x0, #PLAT_PRIMARY_CPU - cset x0, eq - ret -endfunc platform_is_primary_cpu - -func plat_is_my_cpu_primary - mrs x0, mpidr_el1 - b platform_is_primary_cpu -endfunc plat_is_my_cpu_primary - -func plat_my_core_pos - mrs x0, mpidr_el1 - and x1, x0, #MPIDR_CPU_MASK - and x0, x0, #MPIDR_CLUSTER_MASK - add x0, x1, x0, LSR #6 - ret -endfunc plat_my_core_pos - -func plat_get_my_entrypoint - mov_imm x1, PLAT_S10_SEC_ENTRY - ldr x0, [x1] - ret -endfunc plat_get_my_entrypoint - - /* --------------------------------------------- - * int plat_crash_console_init(void) - * Function to initialize the crash console - * without a C Runtime to print crash report. - * Clobber list : x0, x1, x2 - * --------------------------------------------- - */ -func plat_crash_console_init - mov_imm x0, PLAT_UART0_BASE - mov_imm x1, PLAT_UART_CLOCK - mov_imm x2, PLAT_BAUDRATE - b console_16550_core_init -endfunc plat_crash_console_init - - /* --------------------------------------------- - * int plat_crash_console_putc(void) - * Function to print a character on the crash - * console without a C Runtime. - * Clobber list : x1, x2 - * --------------------------------------------- - */ -func plat_crash_console_putc - mov_imm x1, PLAT_UART0_BASE - b console_16550_core_putc -endfunc plat_crash_console_putc - -func plat_crash_console_flush - mov_imm x0, CRASH_CONSOLE_BASE - b console_16550_core_flush -endfunc plat_crash_console_flush - - - /* -------------------------------------------------------- - * void platform_mem_init (void); - * - * Any memory init, relocation to be done before the - * platform boots. Called very early in the boot process. - * -------------------------------------------------------- - */ -func platform_mem_init - mov x0, #0 - ret -endfunc platform_mem_init - - - .data - .align 3 - diff --git a/plat/intel/soc/stratix10/aarch64/platform_common.c b/plat/intel/soc/stratix10/aarch64/platform_common.c deleted file mode 100644 index 094a3621e..000000000 --- a/plat/intel/soc/stratix10/aarch64/platform_common.c +++ /dev/null @@ -1,57 +0,0 @@ -/* - * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include - -unsigned int plat_get_syscnt_freq2(void) -{ - return PLAT_SYS_COUNTER_FREQ_IN_TICKS; -} - -unsigned long plat_get_ns_image_entrypoint(void) -{ - return PLAT_NS_IMAGE_OFFSET; -} - -/****************************************************************************** - * Gets SPSR for BL32 entry - *****************************************************************************/ -uint32_t plat_get_spsr_for_bl32_entry(void) -{ - /* - * The Secure Payload Dispatcher service is responsible for - * setting the SPSR prior to entry into the BL32 image. - */ - return 0; -} - -/****************************************************************************** - * Gets SPSR for BL33 entry - *****************************************************************************/ -uint32_t plat_get_spsr_for_bl33_entry(void) -{ - unsigned long el_status; - unsigned int mode; - uint32_t spsr; - - /* Figure out what mode we enter the non-secure world in */ - el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; - el_status &= ID_AA64PFR0_ELX_MASK; - - mode = (el_status) ? MODE_EL2 : MODE_EL1; - - /* - * TODO: Consider the possibility of specifying the SPSR in - * the FIP ToC and allowing the platform to have a say as - * well. - */ - spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); - return spsr; -} - diff --git a/plat/intel/soc/stratix10/bl2_plat_setup.c b/plat/intel/soc/stratix10/bl2_plat_setup.c index 78301628e..8e8b582fc 100644 --- a/plat/intel/soc/stratix10/bl2_plat_setup.c +++ b/plat/intel/soc/stratix10/bl2_plat_setup.c @@ -19,7 +19,7 @@ #include #include #include -#include +#include #include #include #include @@ -29,7 +29,7 @@ #include "s10_clock_manager.h" #include "s10_handoff.h" #include "s10_pinmux.h" -#include "aarch64/stratix10_private.h" +#include "stratix10_private.h" #include "include/s10_mailbox.h" #include "qspi/cadence_qspi.h" #include "wdt/watchdog.h" @@ -78,7 +78,7 @@ void bl2_el3_early_platform_setup(u_register_t x0, u_register_t x1, console_16550_register(PLAT_UART0_BASE, PLAT_UART_CLOCK, PLAT_BAUDRATE, &console); - plat_delay_timer_init(); + socfpga_delay_timer_init(); init_hard_memory_controller(); } diff --git a/plat/intel/soc/stratix10/bl31_plat_setup.c b/plat/intel/soc/stratix10/bl31_plat_setup.c index 21a370875..d81d5df5a 100644 --- a/plat/intel/soc/stratix10/bl31_plat_setup.c +++ b/plat/intel/soc/stratix10/bl31_plat_setup.c @@ -21,9 +21,8 @@ #include #include #include -#include -#include "aarch64/stratix10_private.h" +#include "stratix10_private.h" #include "s10_handoff.h" #include "s10_reset_manager.h" #include "s10_memory_controller.h" diff --git a/plat/intel/soc/stratix10/include/plat_macros.S b/plat/intel/soc/stratix10/include/plat_macros.S deleted file mode 100644 index 495aa9dd1..000000000 --- a/plat/intel/soc/stratix10/include/plat_macros.S +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright (c) 2019, Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef __PLAT_MACROS_S__ -#define __PLAT_MACROS_S__ - -#include - - /* --------------------------------------------- - * The below required platform porting macro - * prints out relevant platform registers - * whenever an unhandled exception is taken in - * BL31. - * --------------------------------------------- - */ - .macro plat_crash_print_regs - .endm - -#endif /* __PLAT_MACROS_S__ */ diff --git a/plat/intel/soc/stratix10/platform_def.h b/plat/intel/soc/stratix10/include/platform_def.h similarity index 99% rename from plat/intel/soc/stratix10/platform_def.h rename to plat/intel/soc/stratix10/include/platform_def.h index 3ed9023ac..a753acd20 100644 --- a/plat/intel/soc/stratix10/platform_def.h +++ b/plat/intel/soc/stratix10/include/platform_def.h @@ -16,7 +16,7 @@ #define PLAT_CPUID_RELEASE 0xffe1b000 -#define PLAT_S10_SEC_ENTRY 0xffe1b008 +#define PLAT_SEC_ENTRY 0xffe1b008 /* Define next boot image name and offset */ #define PLAT_NS_IMAGE_OFFSET 0x50000 diff --git a/plat/intel/soc/stratix10/include/platform_private.h b/plat/intel/soc/stratix10/include/platform_private.h deleted file mode 100644 index db0c10347..000000000 --- a/plat/intel/soc/stratix10/include/platform_private.h +++ /dev/null @@ -1,41 +0,0 @@ -/* - * Copyright (c) 2019, Intel Corporation. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef __PLATFORM_PRIVATE_H__ -#define __PLATFORM_PRIVATE_H__ -#include - -/******************************************************************************* - * Function and variable prototypes - ******************************************************************************/ -void plat_configure_mmu_el3(unsigned long total_base, - unsigned long total_size, - unsigned long ro_start, - unsigned long ro_limit, - unsigned long coh_start, - unsigned long coh_limit); - - -void plat_configure_mmu_el1(unsigned long total_base, - unsigned long total_size, - unsigned long ro_start, - unsigned long ro_limit, - unsigned long coh_start, - unsigned long coh_limit); - -void plat_gic_driver_init(void); - -void plat_arm_gic_init(void); - -void plat_delay_timer_init(void); - -unsigned long plat_get_ns_image_entrypoint(void); - -uint32_t plat_get_spsr_for_bl32_entry(void); - -uint32_t plat_get_spsr_for_bl33_entry(void); - -#endif /* __PLATFORM_PRIVATE_H__ */ diff --git a/plat/intel/soc/stratix10/aarch64/stratix10_private.h b/plat/intel/soc/stratix10/include/stratix10_private.h similarity index 100% rename from plat/intel/soc/stratix10/aarch64/stratix10_private.h rename to plat/intel/soc/stratix10/include/stratix10_private.h diff --git a/plat/intel/soc/stratix10/plat_psci.c b/plat/intel/soc/stratix10/plat_psci.c index 757852887..f4a970e75 100644 --- a/plat/intel/soc/stratix10/plat_psci.c +++ b/plat/intel/soc/stratix10/plat_psci.c @@ -15,14 +15,13 @@ #include #include "platform_def.h" -#include "platform_private.h" #include "s10_reset_manager.h" #include "s10_mailbox.h" #define S10_RSTMGR_OFST 0xffd11000 #define S10_RSTMGR_MPUMODRST_OFST 0x20 -uintptr_t *stratix10_sec_entry = (uintptr_t *) PLAT_S10_SEC_ENTRY; +uintptr_t *stratix10_sec_entry = (uintptr_t *) PLAT_SEC_ENTRY; uintptr_t *cpuid_release = (uintptr_t *) PLAT_CPUID_RELEASE; /******************************************************************************* diff --git a/plat/intel/soc/stratix10/plat_storage.c b/plat/intel/soc/stratix10/plat_storage.c index f5fd8715c..0b8b9cd2a 100644 --- a/plat/intel/soc/stratix10/plat_storage.c +++ b/plat/intel/soc/stratix10/plat_storage.c @@ -21,7 +21,7 @@ #include #include #include "platform_def.h" -#include "aarch64/stratix10_private.h" +#include "stratix10_private.h" #define STRATIX10_FIP_BASE (0) #define STRATIX10_FIP_MAX_SIZE (0x1000000) diff --git a/plat/intel/soc/stratix10/platform.mk b/plat/intel/soc/stratix10/platform.mk index ed97f4894..34674b0cd 100644 --- a/plat/intel/soc/stratix10/platform.mk +++ b/plat/intel/soc/stratix10/platform.mk @@ -5,9 +5,9 @@ # PLAT_INCLUDES := \ - -Iplat/intel/soc/stratix10/ \ -Iplat/intel/soc/stratix10/include/ \ - -Iplat/intel/soc/common/drivers/ + -Iplat/intel/soc/common/drivers/ \ + -Iplat/intel/soc/common/include/ PLAT_BL_COMMON_SOURCES := \ lib/xlat_tables/xlat_tables_common.c \ @@ -15,12 +15,12 @@ PLAT_BL_COMMON_SOURCES := \ drivers/arm/gic/common/gic_common.c \ drivers/arm/gic/v2/gicv2_main.c \ drivers/arm/gic/v2/gicv2_helpers.c \ - plat/common/plat_gicv2.c \ + plat/common/plat_gicv2.c \ drivers/delay_timer/delay_timer.c \ drivers/delay_timer/generic_delay_timer.c \ drivers/ti/uart/aarch64/16550_console.S \ - plat/intel/soc/stratix10/aarch64/platform_common.c \ - plat/intel/soc/stratix10/aarch64/plat_helpers.S \ + plat/intel/soc/common/aarch64/platform_common.c \ + plat/intel/soc/common/aarch64/plat_helpers.S BL2_SOURCES += \ drivers/partition/partition.c \ @@ -64,7 +64,7 @@ BL31_SOURCES += drivers/arm/cci/cci.c \ plat/intel/soc/stratix10/soc/s10_pinmux.c \ plat/intel/soc/stratix10/soc/s10_clock_manager.c\ plat/intel/soc/stratix10/soc/s10_handoff.c \ - plat/intel/soc/stratix10/soc/s10_mailbox.c \ + plat/intel/soc/stratix10/soc/s10_mailbox.c PROGRAMMABLE_RESET_ADDRESS := 0 BL2_AT_EL3 := 1 diff --git a/plat/intel/soc/stratix10/soc/s10_clock_manager.c b/plat/intel/soc/stratix10/soc/s10_clock_manager.c index dc90076ce..b4d057354 100644 --- a/plat/intel/soc/stratix10/soc/s10_clock_manager.c +++ b/plat/intel/soc/stratix10/soc/s10_clock_manager.c @@ -10,7 +10,6 @@ #include #include #include -#include #include "s10_clock_manager.h" #include "s10_handoff.h" diff --git a/plat/intel/soc/stratix10/soc/s10_handoff.c b/plat/intel/soc/stratix10/soc/s10_handoff.c index 55516c08e..1a4d5c326 100644 --- a/plat/intel/soc/stratix10/soc/s10_handoff.c +++ b/plat/intel/soc/stratix10/soc/s10_handoff.c @@ -13,7 +13,6 @@ #include #include #include -#include #include "s10_handoff.h" diff --git a/plat/intel/soc/stratix10/soc/s10_reset_manager.c b/plat/intel/soc/stratix10/soc/s10_reset_manager.c index 8b58db65a..8b7420bf1 100644 --- a/plat/intel/soc/stratix10/soc/s10_reset_manager.c +++ b/plat/intel/soc/stratix10/soc/s10_reset_manager.c @@ -14,7 +14,6 @@ #include #include #include -#include #include "s10_reset_manager.h" void deassert_peripheral_reset(void)