Browse Source
Pull out common code from aarch64 and include Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I4d0f5e1bb01bcdacbedf8e6c359de594239b645fpull/1932/head
Hadi Asyrafi
5 years ago
committed by
Sandrine Bailleux
Sandrine Bailleux
21 changed files with 21 additions and 266 deletions
@ -1,121 +0,0 @@ |
|||||
/* |
|
||||
* Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. |
|
||||
* |
|
||||
* SPDX-License-Identifier: BSD-3-Clause |
|
||||
*/ |
|
||||
|
|
||||
#include <arch.h> |
|
||||
#include <asm_macros.S> |
|
||||
#include <cpu_macros.S> |
|
||||
#include <platform_def.h> |
|
||||
|
|
||||
.globl plat_secondary_cold_boot_setup |
|
||||
.globl platform_is_primary_cpu |
|
||||
.globl plat_is_my_cpu_primary |
|
||||
.globl plat_my_core_pos |
|
||||
.globl plat_crash_console_init |
|
||||
.globl plat_crash_console_putc |
|
||||
.globl plat_crash_console_flush |
|
||||
.globl platform_mem_init |
|
||||
|
|
||||
.globl plat_get_my_entrypoint |
|
||||
|
|
||||
/* ----------------------------------------------------- |
|
||||
* void plat_secondary_cold_boot_setup (void); |
|
||||
* |
|
||||
* This function performs any platform specific actions |
|
||||
* needed for a secondary cpu after a cold reset e.g |
|
||||
* mark the cpu's presence, mechanism to place it in a |
|
||||
* holding pen etc. |
|
||||
* ----------------------------------------------------- |
|
||||
*/ |
|
||||
func plat_secondary_cold_boot_setup |
|
||||
/* Wait until the it gets reset signal from rstmgr gets populated */ |
|
||||
poll_mailbox: |
|
||||
wfi |
|
||||
|
|
||||
mov_imm x0, PLAT_S10_SEC_ENTRY |
|
||||
ldr x1, [x0] |
|
||||
mov_imm x2, PLAT_CPUID_RELEASE |
|
||||
ldr x3, [x2] |
|
||||
mrs x4, mpidr_el1 |
|
||||
and x4, x4, #0xff |
|
||||
cmp x3, x4 |
|
||||
b.ne poll_mailbox |
|
||||
br x1 |
|
||||
endfunc plat_secondary_cold_boot_setup |
|
||||
|
|
||||
func platform_is_primary_cpu |
|
||||
and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK) |
|
||||
cmp x0, #PLAT_PRIMARY_CPU |
|
||||
cset x0, eq |
|
||||
ret |
|
||||
endfunc platform_is_primary_cpu |
|
||||
|
|
||||
func plat_is_my_cpu_primary |
|
||||
mrs x0, mpidr_el1 |
|
||||
b platform_is_primary_cpu |
|
||||
endfunc plat_is_my_cpu_primary |
|
||||
|
|
||||
func plat_my_core_pos |
|
||||
mrs x0, mpidr_el1 |
|
||||
and x1, x0, #MPIDR_CPU_MASK |
|
||||
and x0, x0, #MPIDR_CLUSTER_MASK |
|
||||
add x0, x1, x0, LSR #6 |
|
||||
ret |
|
||||
endfunc plat_my_core_pos |
|
||||
|
|
||||
func plat_get_my_entrypoint |
|
||||
mov_imm x1, PLAT_S10_SEC_ENTRY |
|
||||
ldr x0, [x1] |
|
||||
ret |
|
||||
endfunc plat_get_my_entrypoint |
|
||||
|
|
||||
/* --------------------------------------------- |
|
||||
* int plat_crash_console_init(void) |
|
||||
* Function to initialize the crash console |
|
||||
* without a C Runtime to print crash report. |
|
||||
* Clobber list : x0, x1, x2 |
|
||||
* --------------------------------------------- |
|
||||
*/ |
|
||||
func plat_crash_console_init |
|
||||
mov_imm x0, PLAT_UART0_BASE |
|
||||
mov_imm x1, PLAT_UART_CLOCK |
|
||||
mov_imm x2, PLAT_BAUDRATE |
|
||||
b console_16550_core_init |
|
||||
endfunc plat_crash_console_init |
|
||||
|
|
||||
/* --------------------------------------------- |
|
||||
* int plat_crash_console_putc(void) |
|
||||
* Function to print a character on the crash |
|
||||
* console without a C Runtime. |
|
||||
* Clobber list : x1, x2 |
|
||||
* --------------------------------------------- |
|
||||
*/ |
|
||||
func plat_crash_console_putc |
|
||||
mov_imm x1, PLAT_UART0_BASE |
|
||||
b console_16550_core_putc |
|
||||
endfunc plat_crash_console_putc |
|
||||
|
|
||||
func plat_crash_console_flush |
|
||||
mov_imm x0, CRASH_CONSOLE_BASE |
|
||||
b console_16550_core_flush |
|
||||
endfunc plat_crash_console_flush |
|
||||
|
|
||||
|
|
||||
/* -------------------------------------------------------- |
|
||||
* void platform_mem_init (void); |
|
||||
* |
|
||||
* Any memory init, relocation to be done before the |
|
||||
* platform boots. Called very early in the boot process. |
|
||||
* -------------------------------------------------------- |
|
||||
*/ |
|
||||
func platform_mem_init |
|
||||
mov x0, #0 |
|
||||
ret |
|
||||
endfunc platform_mem_init |
|
||||
|
|
||||
|
|
||||
.data |
|
||||
.align 3 |
|
||||
|
|
||||
@ -1,57 +0,0 @@ |
|||||
/*
|
|
||||
* Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. |
|
||||
* |
|
||||
* SPDX-License-Identifier: BSD-3-Clause |
|
||||
*/ |
|
||||
|
|
||||
#include <arch_helpers.h> |
|
||||
#include <lib/xlat_tables/xlat_tables.h> |
|
||||
#include <lib/mmio.h> |
|
||||
#include <platform_def.h> |
|
||||
|
|
||||
unsigned int plat_get_syscnt_freq2(void) |
|
||||
{ |
|
||||
return PLAT_SYS_COUNTER_FREQ_IN_TICKS; |
|
||||
} |
|
||||
|
|
||||
unsigned long plat_get_ns_image_entrypoint(void) |
|
||||
{ |
|
||||
return PLAT_NS_IMAGE_OFFSET; |
|
||||
} |
|
||||
|
|
||||
/******************************************************************************
|
|
||||
* Gets SPSR for BL32 entry |
|
||||
*****************************************************************************/ |
|
||||
uint32_t plat_get_spsr_for_bl32_entry(void) |
|
||||
{ |
|
||||
/*
|
|
||||
* The Secure Payload Dispatcher service is responsible for |
|
||||
* setting the SPSR prior to entry into the BL32 image. |
|
||||
*/ |
|
||||
return 0; |
|
||||
} |
|
||||
|
|
||||
/******************************************************************************
|
|
||||
* Gets SPSR for BL33 entry |
|
||||
*****************************************************************************/ |
|
||||
uint32_t plat_get_spsr_for_bl33_entry(void) |
|
||||
{ |
|
||||
unsigned long el_status; |
|
||||
unsigned int mode; |
|
||||
uint32_t spsr; |
|
||||
|
|
||||
/* Figure out what mode we enter the non-secure world in */ |
|
||||
el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT; |
|
||||
el_status &= ID_AA64PFR0_ELX_MASK; |
|
||||
|
|
||||
mode = (el_status) ? MODE_EL2 : MODE_EL1; |
|
||||
|
|
||||
/*
|
|
||||
* TODO: Consider the possibility of specifying the SPSR in |
|
||||
* the FIP ToC and allowing the platform to have a say as |
|
||||
* well. |
|
||||
*/ |
|
||||
spsr = SPSR_64(mode, MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); |
|
||||
return spsr; |
|
||||
} |
|
||||
|
|
||||
@ -1,22 +0,0 @@ |
|||||
/* |
|
||||
* Copyright (c) 2019, Intel Corporation. All rights reserved. |
|
||||
* |
|
||||
* SPDX-License-Identifier: BSD-3-Clause |
|
||||
*/ |
|
||||
|
|
||||
#ifndef __PLAT_MACROS_S__ |
|
||||
#define __PLAT_MACROS_S__ |
|
||||
|
|
||||
#include <platform_def.h> |
|
||||
|
|
||||
/* --------------------------------------------- |
|
||||
* The below required platform porting macro |
|
||||
* prints out relevant platform registers |
|
||||
* whenever an unhandled exception is taken in |
|
||||
* BL31. |
|
||||
* --------------------------------------------- |
|
||||
*/ |
|
||||
.macro plat_crash_print_regs |
|
||||
.endm |
|
||||
|
|
||||
#endif /* __PLAT_MACROS_S__ */ |
|
||||
@ -1,41 +0,0 @@ |
|||||
/*
|
|
||||
* Copyright (c) 2019, Intel Corporation. All rights reserved. |
|
||||
* |
|
||||
* SPDX-License-Identifier: BSD-3-Clause |
|
||||
*/ |
|
||||
|
|
||||
#ifndef __PLATFORM_PRIVATE_H__ |
|
||||
#define __PLATFORM_PRIVATE_H__ |
|
||||
#include <common/bl_common.h> |
|
||||
|
|
||||
/*******************************************************************************
|
|
||||
* Function and variable prototypes |
|
||||
******************************************************************************/ |
|
||||
void plat_configure_mmu_el3(unsigned long total_base, |
|
||||
unsigned long total_size, |
|
||||
unsigned long ro_start, |
|
||||
unsigned long ro_limit, |
|
||||
unsigned long coh_start, |
|
||||
unsigned long coh_limit); |
|
||||
|
|
||||
|
|
||||
void plat_configure_mmu_el1(unsigned long total_base, |
|
||||
unsigned long total_size, |
|
||||
unsigned long ro_start, |
|
||||
unsigned long ro_limit, |
|
||||
unsigned long coh_start, |
|
||||
unsigned long coh_limit); |
|
||||
|
|
||||
void plat_gic_driver_init(void); |
|
||||
|
|
||||
void plat_arm_gic_init(void); |
|
||||
|
|
||||
void plat_delay_timer_init(void); |
|
||||
|
|
||||
unsigned long plat_get_ns_image_entrypoint(void); |
|
||||
|
|
||||
uint32_t plat_get_spsr_for_bl32_entry(void); |
|
||||
|
|
||||
uint32_t plat_get_spsr_for_bl33_entry(void); |
|
||||
|
|
||||
#endif /* __PLATFORM_PRIVATE_H__ */ |
|
||||
Loading…
Reference in new issue