fix(cpus): workaround for Neoverse V2 erratum 2801372

Neoverse V2 erratum 2801372 is a Cat B erratum that applies to
all revisions <=r0p1 and is fixed in r0p2. The workaround is to
insert a dsb before the isb in the power down sequence.

This errata is explained in SDEN 2332927 available at:
https://developer.arm.com/documentation/SDEN2332927

Change-Id: I8716b9785a67270a72ae329dc49a2f2239dfabff
Signed-off-by: Moritz Fischer <moritzf@google.com>

docs/design/cpu-specific-build-macros.rst

@@ -527,6 +527,10 @@ For Neoverse V2, the following errata build flags are defined :
    IP. This needs to be enabled for revisions r0p0 and r0p1. It has been fixed
    in r0p2.
 
+-  ``ERRATA_V2_2801372``: This applies errata 2801372 workaround to Neoverse-V2
+   CPU, this affects all configurations. This needs to be enabled for revisions
+   r0p0 and r0p1. It has been fixed in r0p2.
+
 For Cortex-A710, the following errata build flags are defined :
 
 -  ``ERRATA_A710_1987031``: This applies errata 1987031 workaround to

lib/cpus/aarch64/neoverse_v2.S

@@ -38,6 +38,12 @@ func neoverse_v2_core_pwr_dwn
 	mrs	x0, NEOVERSE_V2_CPUPWRCTLR_EL1
 	orr	x0, x0, #NEOVERSE_V2_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
 	msr	NEOVERSE_V2_CPUPWRCTLR_EL1, x0
+#if ERRATA_V2_2801372
+	mov	x15, x30
+	bl	cpu_get_rev_var
+	bl	errata_neoverse_v2_2801372_wa
+	mov	x30, x15
+#endif /* ERRATA_V2_2801372 */
 	isb
 	ret
 endfunc neoverse_v2_core_pwr_dwn
@@ -51,6 +57,30 @@ func check_errata_cve_2022_23960
 	ret
 endfunc check_errata_cve_2022_23960
 
+	/* ----------------------------------------------------
+	 * Errata Workaround for Neoverse V2 Errata #2801372
+	 * This applies to revisions <= r0p1 and is fixed in r0p2.
+	 * x0: variant[4:7] and revision[0:3] of current cpu.
+	 * Shall clobber: x0-x17
+	 * ----------------------------------------------------
+	 */
+func errata_neoverse_v2_2801372_wa
+	mov	x17, x30
+	bl	check_errata_2801372
+	cbz	x0, 1f
+
+	/* dsb before isb of power down sequence */
+	dsb	sy
+1:
+	ret	x17
+endfunc errata_neoverse_v2_2801372_wa
+
+func check_errata_2801372
+	/* Applies to all revisions <= r0p1 */
+	mov	x1, #0x01
+	b	cpu_rev_var_ls
+endfunc check_errata_2801372
+
 func neoverse_v2_reset_func
 	/* Disable speculative loads */
 	msr	SSBS, xzr
@@ -82,6 +112,7 @@ func neoverse_v2_errata_report
 	 * checking functions of each errata.
 	 */
 	report_errata WORKAROUND_CVE_2022_23960, neoverse_v2, cve_2022_23960
+	report_errata ERRATA_V2_2801372, neoverse_v2, 2801372
 
 	ldp	x8, x30, [sp], #16
 	ret

lib/cpus/cpu-ops.mk

@@ -782,6 +782,10 @@ CPU_FLAG_LIST += ERRATA_A510_2684597
 # erratum applies to revisions r0p0, rop1. Fixed in r0p2.
 CPU_FLAG_LIST += ERRATA_V2_2719103
 
+# Flag to apply erratum 2801372 workaround for all configurations.
+# This erratum applies to revisions r0p0, r0p1. Fixed in r0p2.
+CPU_FLAG_LIST += ERRATA_V2_2801372
+
 # Flag to apply erratum 2701951 workaround for non-arm interconnect ip.
 # This erratum applies to revisions r0p0, r1p0, and r1p1. Its is fixed in r1p2.
 CPU_FLAG_LIST += ERRATA_A715_2701951

services/std_svc/errata_abi/errata_abi_main.c

@@ -399,7 +399,8 @@ struct em_cpu_list cpu_list[] = {
 	.cpu_errata_list = {
 		[0] = {2719103, 0x00, 0x01, ERRATA_V2_2719103, \
 			ERRATA_NON_ARM_INTERCONNECT},
-		[1 ... ERRATA_LIST_END] = UNDEF_ERRATA,
+		[1] = {2801372, 0x00, 0x01, ERRATA_V2_2801372},
+		[2 ... ERRATA_LIST_END] = UNDEF_ERRATA,
 	}
 },
 #endif /* NEOVERSE_V2_H_INC */