danh-arm
11 years ago
24 changed files with 714 additions and 35 deletions
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/*
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* Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* Redistributions of source code must retain the above copyright notice, this |
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* list of conditions and the following disclaimer. |
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* |
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* Redistributions in binary form must reproduce the above copyright notice, |
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* this list of conditions and the following disclaimer in the documentation |
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* and/or other materials provided with the distribution. |
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* |
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* Neither the name of ARM nor the names of its contributors may be used |
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* to endorse or promote products derived from this software without specific |
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* prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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* POSSIBILITY OF SUCH DAMAGE. |
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*/ |
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|
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#include <assert.h> |
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#include "arch_helpers.h" |
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#include "tzc400.h" |
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#include "mmio.h" |
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#include "debug.h" |
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static uint32_t tzc_read_build_config(uint64_t base) |
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{ |
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return mmio_read_32(base + BUILD_CONFIG_OFF); |
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} |
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static uint32_t tzc_read_gate_keeper(uint64_t base) |
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{ |
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return mmio_read_32(base + GATE_KEEPER_OFF); |
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} |
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static void tzc_write_gate_keeper(uint64_t base, uint32_t val) |
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{ |
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mmio_write_32(base + GATE_KEEPER_OFF, val); |
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} |
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static void tzc_write_action(uint64_t base, enum tzc_action action) |
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{ |
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mmio_write_32(base + ACTION_OFF, action); |
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} |
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static void tzc_write_region_base_low(uint64_t base, uint32_t region, uint32_t val) |
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{ |
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mmio_write_32(base + REGION_BASE_LOW_OFF + REGION_NUM_OFF(region), val); |
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} |
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static void tzc_write_region_base_high(uint64_t base, uint32_t region, uint32_t val) |
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{ |
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mmio_write_32(base + REGION_BASE_HIGH_OFF + REGION_NUM_OFF(region), val); |
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} |
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static void tzc_write_region_top_low(uint64_t base, uint32_t region, uint32_t val) |
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{ |
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mmio_write_32(base + REGION_TOP_LOW_OFF + REGION_NUM_OFF(region), val); |
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} |
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static void tzc_write_region_top_high(uint64_t base, uint32_t region, uint32_t val) |
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{ |
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mmio_write_32(base + REGION_TOP_HIGH_OFF + REGION_NUM_OFF(region), val); |
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} |
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static void tzc_write_region_attributes(uint64_t base, uint32_t region, uint32_t val) |
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{ |
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mmio_write_32(base + REGION_ATTRIBUTES_OFF + REGION_NUM_OFF(region), val); |
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} |
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static void tzc_write_region_id_access(uint64_t base, uint32_t region, uint32_t val) |
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{ |
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mmio_write_32(base + REGION_ID_ACCESS_OFF + REGION_NUM_OFF(region), val); |
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} |
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static uint32_t tzc_read_component_id(uint64_t base) |
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{ |
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uint32_t id; |
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id = mmio_read_8(base + CID0_OFF); |
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id |= (mmio_read_8(base + CID1_OFF) << 8); |
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id |= (mmio_read_8(base + CID2_OFF) << 16); |
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id |= (mmio_read_8(base + CID3_OFF) << 24); |
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return id; |
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} |
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static uint32_t tzc_get_gate_keeper(uint64_t base, uint8_t filter) |
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{ |
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uint32_t tmp; |
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tmp = (tzc_read_gate_keeper(base) >> GATE_KEEPER_OS_SHIFT) & |
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GATE_KEEPER_OS_MASK; |
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return tmp >> filter; |
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} |
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/* This function is not MP safe. */ |
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static void tzc_set_gate_keeper(uint64_t base, uint8_t filter, uint32_t val) |
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{ |
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uint32_t tmp; |
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/* Upper half is current state. Lower half is requested state. */ |
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tmp = (tzc_read_gate_keeper(base) >> GATE_KEEPER_OS_SHIFT) & |
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GATE_KEEPER_OS_MASK; |
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if (val) |
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tmp |= (1 << filter); |
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else |
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tmp &= ~(1 << filter); |
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tzc_write_gate_keeper(base, (tmp & GATE_KEEPER_OR_MASK) << |
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GATE_KEEPER_OR_SHIFT); |
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/* Wait here until we see the change reflected in the TZC status. */ |
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while (((tzc_read_gate_keeper(base) >> GATE_KEEPER_OS_SHIFT) & |
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GATE_KEEPER_OS_MASK) != tmp) |
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; |
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} |
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void tzc_init(struct tzc_instance *controller) |
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{ |
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uint32_t tzc_id, tzc_build; |
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assert(controller != NULL); |
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/*
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* We expect to see a tzc400. Check component ID. The TZC-400 TRM shows |
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* component ID is expected to be "0xB105F00D". |
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*/ |
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tzc_id = tzc_read_component_id(controller->base); |
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if (tzc_id != TZC400_COMPONENT_ID) { |
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ERROR("TZC : Wrong device ID (0x%x).\n", tzc_id); |
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panic(); |
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} |
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/* Save values we will use later. */ |
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tzc_build = tzc_read_build_config(controller->base); |
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controller->num_filters = ((tzc_build >> BUILD_CONFIG_NF_SHIFT) & |
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BUILD_CONFIG_NF_MASK) + 1; |
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controller->addr_width = ((tzc_build >> BUILD_CONFIG_AW_SHIFT) & |
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BUILD_CONFIG_AW_MASK) + 1; |
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controller->num_regions = ((tzc_build >> BUILD_CONFIG_NR_SHIFT) & |
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BUILD_CONFIG_NR_MASK) + 1; |
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} |
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/*
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* `tzc_configure_region` is used to program regions into the TrustZone |
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* controller. A region can be associated with more than one filter. The |
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* associated filters are passed in as a bitmap (bit0 = filter0). |
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* NOTE: |
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* The region 0 covers the whole address space and is enabled on all filters, |
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* this cannot be changed. It is, however, possible to change some region 0 |
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* permissions. |
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*/ |
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void tzc_configure_region(const struct tzc_instance *controller, |
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uint32_t filters, |
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uint8_t region, |
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uint64_t region_base, |
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uint64_t region_top, |
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enum tzc_region_attributes sec_attr, |
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uint32_t ns_device_access) |
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{ |
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uint64_t max_addr; |
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assert(controller != NULL); |
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/* Do range checks on filters and regions. */ |
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assert(((filters >> controller->num_filters) == 0) && |
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(region < controller->num_regions)); |
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/*
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* Do address range check based on TZC configuration. A 64bit address is |
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* the max and expected case. |
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*/ |
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max_addr = UINT64_MAX >> (64 - controller->addr_width); |
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if ((region_top > max_addr) || (region_base >= region_top)) |
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assert(0); |
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/* region_base and (region_top + 1) must be 4KB aligned */ |
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assert(((region_base | (region_top + 1)) & (4096 - 1)) == 0); |
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assert(sec_attr <= TZC_REGION_S_RDWR); |
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/*
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* Inputs look ok, start programming registers. |
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* All the address registers are 32 bits wide and have a LOW and HIGH |
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* component used to construct a up to a 64bit address. |
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*/ |
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tzc_write_region_base_low(controller->base, region, (uint32_t)(region_base)); |
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tzc_write_region_base_high(controller->base, region, (uint32_t)(region_base >> 32)); |
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tzc_write_region_top_low(controller->base, region, (uint32_t)(region_top)); |
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tzc_write_region_top_high(controller->base, region, (uint32_t)(region_top >> 32)); |
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/* Assign the region to a filter and set secure attributes */ |
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tzc_write_region_attributes(controller->base, region, |
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(sec_attr << REGION_ATTRIBUTES_SEC_SHIFT) | filters); |
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/*
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* Specify which non-secure devices have permission to access this |
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* region. |
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*/ |
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tzc_write_region_id_access(controller->base, region, ns_device_access); |
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} |
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void tzc_set_action(const struct tzc_instance *controller, enum tzc_action action) |
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{ |
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assert(controller != NULL); |
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/*
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* - Currently no handler is provided to trap an error via interrupt |
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* or exception. |
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* - The interrupt action has not been tested. |
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*/ |
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tzc_write_action(controller->base, action); |
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} |
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void tzc_enable_filters(const struct tzc_instance *controller) |
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{ |
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uint32_t state; |
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uint32_t filter; |
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assert(controller != NULL); |
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for (filter = 0; filter < controller->num_filters; filter++) { |
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state = tzc_get_gate_keeper(controller->base, filter); |
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if (state) { |
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ERROR("TZC : Filter %d Gatekeeper already enabled.\n", |
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filter); |
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panic(); |
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} |
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tzc_set_gate_keeper(controller->base, filter, 1); |
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} |
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} |
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void tzc_disable_filters(const struct tzc_instance *controller) |
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{ |
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uint32_t filter; |
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assert(controller != NULL); |
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/*
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* We don't do the same state check as above as the Gatekeepers are |
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* disabled after reset. |
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*/ |
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for (filter = 0; filter < controller->num_filters; filter++) |
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tzc_set_gate_keeper(controller->base, filter, 0); |
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} |
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@ -0,0 +1,211 @@ |
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/*
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* Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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* |
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* Redistributions of source code must retain the above copyright notice, this |
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* list of conditions and the following disclaimer. |
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* |
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* Redistributions in binary form must reproduce the above copyright notice, |
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* this list of conditions and the following disclaimer in the documentation |
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* and/or other materials provided with the distribution. |
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* |
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* Neither the name of ARM nor the names of its contributors may be used |
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* to endorse or promote products derived from this software without specific |
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* prior written permission. |
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* |
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
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* POSSIBILITY OF SUCH DAMAGE. |
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*/ |
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#ifndef __TZC400_H__ |
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#define __TZC400_H__ |
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#include <stdint.h> |
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#define BUILD_CONFIG_OFF 0x000 |
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#define ACTION_OFF 0x004 |
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#define GATE_KEEPER_OFF 0x008 |
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#define SPECULATION_CTRL_OFF 0x00c |
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#define INT_STATUS 0x010 |
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#define INT_CLEAR 0x014 |
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#define FAIL_ADDRESS_LOW_OFF 0x020 |
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#define FAIL_ADDRESS_HIGH_OFF 0x024 |
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#define FAIL_CONTROL_OFF 0x028 |
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#define FAIL_ID 0x02c |
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#define REGION_BASE_LOW_OFF 0x100 |
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#define REGION_BASE_HIGH_OFF 0x104 |
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#define REGION_TOP_LOW_OFF 0x108 |
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#define REGION_TOP_HIGH_OFF 0x10c |
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#define REGION_ATTRIBUTES_OFF 0x110 |
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#define REGION_ID_ACCESS_OFF 0x114 |
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#define REGION_NUM_OFF(region) (0x20 * region) |
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/* ID Registers */ |
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#define PID0_OFF 0xfe0 |
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#define PID1_OFF 0xfe4 |
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#define PID2_OFF 0xfe8 |
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#define PID3_OFF 0xfec |
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#define PID4_OFF 0xfd0 |
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#define PID5_OFF 0xfd4 |
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#define PID6_OFF 0xfd8 |
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#define PID7_OFF 0xfdc |
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#define CID0_OFF 0xff0 |
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#define CID1_OFF 0xff4 |
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#define CID2_OFF 0xff8 |
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#define CID3_OFF 0xffc |
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#define BUILD_CONFIG_NF_SHIFT 24 |
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#define BUILD_CONFIG_NF_MASK 0x3 |
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#define BUILD_CONFIG_AW_SHIFT 8 |
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#define BUILD_CONFIG_AW_MASK 0x3f |
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#define BUILD_CONFIG_NR_SHIFT 0 |
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#define BUILD_CONFIG_NR_MASK 0x1f |
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/* Not describing the case where regions 1 to 8 overlap */ |
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#define ACTION_RV_SHIFT 0 |
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#define ACTION_RV_MASK 0x3 |
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#define ACTION_RV_LOWOK 0x0 |
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#define ACTION_RV_LOWERR 0x1 |
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#define ACTION_RV_HIGHOK 0x2 |
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#define ACTION_RV_HIGHERR 0x3 |
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/*
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* Number of gate keepers is implementation defined. But we know the max for |
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* this device is 4. Get implementation details from BUILD_CONFIG. |
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*/ |
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#define GATE_KEEPER_OS_SHIFT 16 |
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#define GATE_KEEPER_OS_MASK 0xf |
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#define GATE_KEEPER_OR_SHIFT 0 |
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#define GATE_KEEPER_OR_MASK 0xf |
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/* Speculation is enabled by default. */ |
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#define SPECULATION_CTRL_WRITE_DISABLE (1 << 1) |
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#define SPECULATION_CTRL_READ_DISABLE (1 << 0) |
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/* Max number of filters allowed is 4. */ |
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#define INT_STATUS_OVERLAP_SHIFT 16 |
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#define INT_STATUS_OVERLAP_MASK 0xf |
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#define INT_STATUS_OVERRUN_SHIFT 8 |
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#define INT_STATUS_OVERRUN_MASK 0xf |
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#define INT_STATUS_STATUS_SHIFT 0 |
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#define INT_STATUS_STATUS_MASK 0xf |
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#define INT_CLEAR_CLEAR_SHIFT 0 |
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#define INT_CLEAR_CLEAR_MASK 0xf |
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#define FAIL_CONTROL_DIR_SHIFT (1 << 24) |
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#define FAIL_CONTROL_DIR_READ 0x0 |
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#define FAIL_CONTROL_DIR_WRITE 0x1 |
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#define FAIL_CONTROL_NS_SHIFT (1 << 21) |
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#define FAIL_CONTROL_NS_SECURE 0x0 |
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#define FAIL_CONTROL_NS_NONSECURE 0x1 |
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#define FAIL_CONTROL_PRIV_SHIFT (1 << 20) |
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#define FAIL_CONTROL_PRIV_PRIV 0x0 |
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#define FAIL_CONTROL_PRIV_UNPRIV 0x1 |
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/*
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* FAIL_ID_ID_MASK depends on AID_WIDTH which is platform specific. |
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* Platform should provide the value on initialisation. |
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*/ |
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#define FAIL_ID_VNET_SHIFT 24 |
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#define FAIL_ID_VNET_MASK 0xf |
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#define FAIL_ID_ID_SHIFT 0 |
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/* Used along with 'tzc_region_attributes_t' below */ |
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#define REGION_ATTRIBUTES_SEC_SHIFT 30 |
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#define REGION_ATTRIBUTES_F_EN_SHIFT 0 |
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#define REGION_ATTRIBUTES_F_EN_MASK 0xf |
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#define REGION_ID_ACCESS_NSAID_WR_EN_SHIFT 16 |
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#define REGION_ID_ACCESS_NSAID_RD_EN_SHIFT 0 |
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#define REGION_ID_ACCESS_NSAID_ID_MASK 0xf |
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/* Macros for setting Region ID access permissions based on NSAID */ |
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#define TZC_REGION_ACCESS_RD(id) \ |
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((1 << (id & REGION_ID_ACCESS_NSAID_ID_MASK)) << \ |
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REGION_ID_ACCESS_NSAID_RD_EN_SHIFT) |
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#define TZC_REGION_ACCESS_WR(id) \ |
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((1 << (id & REGION_ID_ACCESS_NSAID_ID_MASK)) << \ |
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REGION_ID_ACCESS_NSAID_WR_EN_SHIFT) |
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#define TZC_REGION_ACCESS_RDWR(id) \ |
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(TZC_REGION_ACCESS_RD(id) | TZC_REGION_ACCESS_WR(id)) |
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/* Filters are bit mapped 0 to 3. */ |
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#define TZC400_COMPONENT_ID 0xb105f00d |
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#ifndef __ASSEMBLY__ |
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/*******************************************************************************
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* Function & variable prototypes |
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******************************************************************************/ |
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/*
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* What type of action is expected when an access violation occurs. |
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* The memory requested is zeroed. But we can also raise and event to |
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* let the system know it happened. |
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* We can raise an interrupt(INT) and/or cause an exception(ERR). |
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* TZC_ACTION_NONE - No interrupt, no Exception |
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* TZC_ACTION_ERR - No interrupt, raise exception -> sync external |
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* data abort |
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* TZC_ACTION_INT - Raise interrupt, no exception |
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* TZC_ACTION_ERR_INT - Raise interrupt, raise exception -> sync |
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* external data abort |
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*/ |
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enum tzc_action { |
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TZC_ACTION_NONE = 0, |
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TZC_ACTION_ERR = 1, |
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TZC_ACTION_INT = 2, |
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TZC_ACTION_ERR_INT = (TZC_ACTION_ERR | TZC_ACTION_INT) |
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}; |
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/*
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* Controls secure access to a region. If not enabled secure access is not |
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* allowed to region. |
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*/ |
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enum tzc_region_attributes { |
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TZC_REGION_S_NONE = 0, |
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TZC_REGION_S_RD = 1, |
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TZC_REGION_S_WR = 2, |
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TZC_REGION_S_RDWR = (TZC_REGION_S_RD | TZC_REGION_S_WR) |
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}; |
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/*
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* Implementation defined values used to validate inputs later. |
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* Filters : max of 4 ; 0 to 3 |
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* Regions : max of 9 ; 0 to 8 |
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* Address width : Values between 32 to 64 |
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*/ |
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struct tzc_instance { |
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uint64_t base; |
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uint32_t aid_width; |
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uint8_t addr_width; |
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uint8_t num_filters; |
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uint8_t num_regions; |
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}; |
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void tzc_init(struct tzc_instance *controller); |
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void tzc_configure_region(const struct tzc_instance *controller, uint32_t filters, |
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uint8_t region, uint64_t region_base, uint64_t region_top, |
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enum tzc_region_attributes sec_attr, uint32_t ns_device_access); |
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void tzc_enable_filters(const struct tzc_instance *controller); |
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void tzc_disable_filters(const struct tzc_instance *controller); |
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void tzc_set_action(const struct tzc_instance *controller, |
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enum tzc_action action); |
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#endif /*__ASSEMBLY__*/ |
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#endif /* __TZC400__ */ |
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@ -0,0 +1,131 @@ |
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/*
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* Copyright (c) 2014, ARM Limited and Contributors. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
|||
* modification, are permitted provided that the following conditions are met: |
|||
* |
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* Redistributions of source code must retain the above copyright notice, this |
|||
* list of conditions and the following disclaimer. |
|||
* |
|||
* Redistributions in binary form must reproduce the above copyright notice, |
|||
* this list of conditions and the following disclaimer in the documentation |
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* and/or other materials provided with the distribution. |
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* |
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* Neither the name of ARM nor the names of its contributors may be used |
|||
* to endorse or promote products derived from this software without specific |
|||
* prior written permission. |
|||
* |
|||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
|||
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
|||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
|||
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
|||
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
|||
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
|||
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
|||
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
|||
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
|||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
|||
* POSSIBILITY OF SUCH DAMAGE. |
|||
*/ |
|||
|
|||
#include <assert.h> |
|||
#include "platform.h" |
|||
#include "tzc400.h" |
|||
#include "debug.h" |
|||
|
|||
/* Used to improve readability for configuring regions. */ |
|||
#define FILTER_SHIFT(filter) (1 << filter) |
|||
|
|||
/*
|
|||
* For the moment we assume that all security programming is done by the |
|||
* primary core. |
|||
* TODO: |
|||
* Might want to enable interrupt on violations when supported? |
|||
*/ |
|||
void plat_security_setup(void) |
|||
{ |
|||
struct tzc_instance controller; |
|||
|
|||
/*
|
|||
* The Base FVP has a TrustZone address space controller, the Foundation |
|||
* FVP does not. Trying to program the device on the foundation FVP will |
|||
* cause an abort. |
|||
* |
|||
* If the platform had additional peripheral specific security |
|||
* configurations, those would be configured here. |
|||
*/ |
|||
|
|||
if (!platform_get_cfgvar(CONFIG_HAS_TZC)) |
|||
return; |
|||
|
|||
/*
|
|||
* The TrustZone controller controls access to main DRAM. Give |
|||
* full NS access for the moment to use with OS. |
|||
*/ |
|||
INFO("Configuring TrustZone Controller\n"); |
|||
|
|||
/*
|
|||
* The driver does some error checking and will assert. |
|||
* - Provide base address of device on platform. |
|||
* - Provide width of ACE-Lite IDs on platform. |
|||
*/ |
|||
controller.base = TZC400_BASE; |
|||
controller.aid_width = FVP_AID_WIDTH; |
|||
tzc_init(&controller); |
|||
|
|||
/*
|
|||
* Currently only filters 0 and 2 are connected on Base FVP. |
|||
* Filter 0 : CPU clusters (no access to DRAM by default) |
|||
* Filter 1 : not connected |
|||
* Filter 2 : LCDs (access to VRAM allowed by default) |
|||
* Filter 3 : not connected |
|||
* Programming unconnected filters will have no effect at the |
|||
* moment. These filter could, however, be connected in future. |
|||
* So care should be taken not to configure the unused filters. |
|||
*/ |
|||
|
|||
/* Disable all filters before programming. */ |
|||
tzc_disable_filters(&controller); |
|||
|
|||
/*
|
|||
* Allow full access to all DRAM to supported devices for the |
|||
* moment. Give access to the CPUs and Virtio. Some devices |
|||
* would normally use the default ID so allow that too. We use |
|||
* three different regions to cover the three separate blocks of |
|||
* memory in the FVPs. We allow secure access to DRAM to load NS |
|||
* software. |
|||
* FIXME: In current models Virtio uses a reserved ID. This is |
|||
* not correct and will be fixed. |
|||
*/ |
|||
|
|||
/* Set to cover 2GB block of DRAM */ |
|||
tzc_configure_region(&controller, FILTER_SHIFT(0), 1, |
|||
DRAM_BASE, 0xFFFFFFFF, TZC_REGION_S_RDWR, |
|||
TZC_REGION_ACCESS_RDWR(FVP_NSAID_AP) | |
|||
TZC_REGION_ACCESS_RDWR(FVP_NSAID_DEFAULT) | |
|||
TZC_REGION_ACCESS_RDWR(FVP_NSAID_RES5)); |
|||
|
|||
/* Set to cover the 30GB block */ |
|||
tzc_configure_region(&controller, FILTER_SHIFT(0), 2, |
|||
0x880000000, 0xFFFFFFFFF, TZC_REGION_S_RDWR, |
|||
TZC_REGION_ACCESS_RDWR(FVP_NSAID_AP) | |
|||
TZC_REGION_ACCESS_RDWR(FVP_NSAID_DEFAULT) | |
|||
TZC_REGION_ACCESS_RDWR(FVP_NSAID_RES5)); |
|||
|
|||
/* Set to cover 480GB block */ |
|||
tzc_configure_region(&controller, FILTER_SHIFT(0), 3, |
|||
0x8800000000, 0xFFFFFFFFFF, TZC_REGION_S_RDWR, |
|||
TZC_REGION_ACCESS_RDWR(FVP_NSAID_AP) | |
|||
TZC_REGION_ACCESS_RDWR(FVP_NSAID_DEFAULT) | |
|||
TZC_REGION_ACCESS_RDWR(FVP_NSAID_RES5)); |
|||
|
|||
/*
|
|||
* TODO: Interrupts are not currently supported. The only |
|||
* options we have are for access errors to occur quietly or to |
|||
* cause an exception. We choose to cause an exception. |
|||
*/ |
|||
tzc_set_action(&controller, TZC_ACTION_ERR); |
|||
|
|||
/* Enable filters. */ |
|||
tzc_enable_filters(&controller); |
|||
} |
|||
Loading…
Reference in new issue