Hikey960: Change CPU standby state for WFI

At early time, the CPU CA73 retention state has been supported on
Hikey960.  Later we found the system has the hang issue and for
resolving this issue Hisilicon released new MCU firmware, but
unfortunately the new MCU firmware has side effect and results in the
CA73 CPU cannot really enter retention state and roll back to WFI state.

After discussion we cannot see the possibility to enable CA73 retention
state anymore on Hikey960, based on this conclusion we should remove
this state supporting from ARM-TF and roll back to WFI state only.  We
will commit one patch to remove CA73 CPU retention state in kernel DT
binding as well.

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Haojian Zhuang <haojian.zhuang@linaro.org>
Cc: Kevin Wang <jean.wangtao@linaro.org>
Cc: Vincent Guittot <vincent.guittot@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>

plat/hisilicon/hikey960/aarch64/hikey960_helpers.S

@@ -16,8 +16,6 @@
 	.globl	plat_crash_console_putc
 	.globl	plat_report_exception
 	.globl	plat_reset_handler
-	.globl	set_retention_ticks
-	.globl	clr_retention_ticks
 	.globl	clr_ex
 	.globl	nop
 
@@ -138,35 +136,6 @@ func plat_reset_handler
 	ret
 endfunc plat_reset_handler
 
-	/* -----------------------------------------------------
-	 * void set_retention_ticks(unsigned int val);
-	 * Clobber list : x0
-	 * -----------------------------------------------------
-	 */
-func set_retention_ticks
-	mrs	x0, CORTEX_A53_ECTLR_EL1
-	bic	x0, x0, #CORTEX_A53_ECTLR_CPU_RET_CTRL_MASK
-	orr	x0, x0, #RETENTION_ENTRY_TICKS_8
-	msr	CORTEX_A53_ECTLR_EL1, x0
-	isb
-	dsb	sy
-	ret
-endfunc set_retention_ticks
-
-	/* -----------------------------------------------------
-	 * void clr_retention_ticks(unsigned int val);
-	 * Clobber list : x0
-	 * -----------------------------------------------------
-	 */
-func clr_retention_ticks
-	mrs	x0, CORTEX_A53_ECTLR_EL1
-	bic	x0, x0, #CORTEX_A53_ECTLR_CPU_RET_CTRL_MASK
-	msr	CORTEX_A53_ECTLR_EL1, x0
-	isb
-	dsb	sy
-	ret
-endfunc clr_retention_ticks
-
 	/* -----------------------------------------------------
 	 * void clrex(void);
 	 * -----------------------------------------------------

plat/hisilicon/hikey960/hikey960_pm.c

@@ -34,18 +34,16 @@ static uintptr_t hikey960_sec_entrypoint;
 static void hikey960_pwr_domain_standby(plat_local_state_t cpu_state)
 {
 	unsigned long scr;
-	unsigned int val = 0;
-
-	assert(cpu_state == PLAT_MAX_RET_STATE);
 
 	scr = read_scr_el3();
 
-	/* Enable Physical IRQ and FIQ to wake the CPU*/
+	/* Enable Physical IRQ and FIQ to wake the CPU */
 	write_scr_el3(scr | SCR_IRQ_BIT | SCR_FIQ_BIT);
 
-	set_retention_ticks(val);
+	/* Add barrier before CPU enter WFI state */
+	isb();
+	dsb();
 	wfi();
-	clr_retention_ticks(val);
 
 	/*
 	 * Restore SCR to the original value, synchronisazion of