feat(morello): add cpuidle support

This patch adds necessary device-tree idle state definitions and enables
relevant platform makefile options.

Co-authored-by: Karl Meakin <karl.meakin@arm.com>
Signed-off-by: sahil <sahil@arm.com>
Change-Id: Iaf95867095f0514ec3994b9c9efd9756ed49ef43

fdts/morello-fvp.dts

@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2020-2022, Arm Limited. All rights reserved.
+ * Copyright (c) 2020-2023, Arm Limited. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -25,6 +25,32 @@
 		};
 	};
 
+	/*
+	 * The timings below are just to demonstrate working cpuidle.
+	 * These values may be inaccurate.
+	 */
+	idle-states {
+		entry-method = "psci";
+
+		cluster_sleep: cluster-sleep {
+			compatible = "arm,idle-state";
+			arm,psci-suspend-param = <0x40000022>;
+			local-timer-stop;
+			entry-latency-us = <500>;
+			exit-latency-us = <1000>;
+			min-residency-us = <2500>;
+		};
+
+		cpu_sleep: cpu-sleep {
+			compatible = "arm,idle-state";
+			arm,psci-suspend-param = <0x40000002>;
+			local-timer-stop;
+			entry-latency-us = <150>;
+			exit-latency-us = <300>;
+			min-residency-us = <200>;
+		};
+	};
+
 	cpus {
 		#address-cells = <2>;
 		#size-cells = <0>;
@@ -53,6 +79,7 @@
 			device_type = "cpu";
 			enable-method = "psci";
 			clocks = <&scmi_dvfs 0>;
+			cpu-idle-states = <&cpu_sleep &cluster_sleep>;
 		};
 		CPU1: cpu1@100 {
 			compatible = "arm,armv8";
@@ -60,6 +87,7 @@
 			device_type = "cpu";
 			enable-method = "psci";
 			clocks = <&scmi_dvfs 0>;
+			cpu-idle-states = <&cpu_sleep &cluster_sleep>;
 		};
 		CPU2: cpu2@10000 {
 			compatible = "arm,armv8";
@@ -67,6 +95,7 @@
 			device_type = "cpu";
 			enable-method = "psci";
 			clocks = <&scmi_dvfs 1>;
+			cpu-idle-states = <&cpu_sleep &cluster_sleep>;
 		};
 		CPU3: cpu3@10100 {
 			compatible = "arm,armv8";
@@ -74,6 +103,7 @@
 			device_type = "cpu";
 			enable-method = "psci";
 			clocks = <&scmi_dvfs 1>;
+			cpu-idle-states = <&cpu_sleep &cluster_sleep>;
 		};
 	};
 

fdts/morello-soc.dts

@@ -26,6 +26,32 @@
 		};
 	};
 
+	/*
+	 * The timings below are just to demonstrate working cpuidle.
+	 * These values may be inaccurate.
+	 */
+	idle-states {
+		entry-method = "psci";
+
+		cluster_sleep: cluster-sleep {
+			compatible = "arm,idle-state";
+			arm,psci-suspend-param = <0x40000022>;
+			local-timer-stop;
+			entry-latency-us = <500>;
+			exit-latency-us = <1000>;
+			min-residency-us = <2500>;
+		};
+
+		cpu_sleep: cpu-sleep {
+			compatible = "arm,idle-state";
+			arm,psci-suspend-param = <0x40000002>;
+			local-timer-stop;
+			entry-latency-us = <150>;
+			exit-latency-us = <300>;
+			min-residency-us = <200>;
+		};
+	};
+
 	cpus {
 		#address-cells = <2>;
 		#size-cells = <0>;
@@ -44,6 +70,7 @@
 				1800000		750000
 			>;
 			#cooling-cells = <2>;
+			cpu-idle-states = <&cpu_sleep &cluster_sleep>;
 		};
 		cpu1: cpu1@100 {
 			compatible = "arm,armv8";
@@ -60,6 +87,7 @@
 				1800000		750000
 			>;
 			#cooling-cells = <2>;
+			cpu-idle-states = <&cpu_sleep &cluster_sleep>;
 		};
 		cpu2: cpu2@10000 {
 			compatible = "arm,armv8";
@@ -76,6 +104,7 @@
 				1800000		750000
 			>;
 			#cooling-cells = <2>;
+			cpu-idle-states = <&cpu_sleep &cluster_sleep>;
 		};
 		cpu3: cpu3@10100 {
 			compatible = "arm,armv8";
@@ -92,6 +121,7 @@
 				1800000		750000
 			>;
 			#cooling-cells = <2>;
+			cpu-idle-states = <&cpu_sleep &cluster_sleep>;
 		};
 	};
 

plat/arm/board/morello/platform.mk

@@ -89,6 +89,9 @@ override ARM_PLAT_MT			:=	1
 
 override ARM_BL31_IN_DRAM		:=	1
 
+override PSCI_EXTENDED_STATE_ID		:=	1
+override ARM_RECOM_STATE_ID_ENC		:=	1
+
 # Errata workarounds:
 ERRATA_N1_1868343			:=	1