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To make it possible to use the hw_config device tree for dynamic configuration in BL31 on the Arm Juno platform. A placeholder hw_config has been added that is included in the FIP and a Juno specific BL31 setup has been added to populate fconf with the hw_config. Juno's BL2 setup has been updated to align it with the new behavior implemented in the Arm FVP platform, where fw_config is passed in arg1 to BL31 instead of soc_fw_config. The BL31 setup is expected to use the fw_config passed in arg1 to find the hw_config. Signed-off-by: Mikael Olsson <mikael.olsson@arm.com> Change-Id: Ib3570faa6714f92ab8451e8f1e59779dcf19c0b6pull/1942/head
Mikael Olsson
4 years ago
committed by
Manish Pandey
8 changed files with 142 additions and 8 deletions
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/* |
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* Copyright (c) 2021, Arm Limited. All rights reserved. |
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* |
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* SPDX-License-Identifier: BSD-3-Clause |
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*/ |
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/dts-v1/; |
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/ { |
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}; |
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/*
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* Copyright (c) 2021, Arm Limited and Contributors. All rights reserved. |
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* |
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* SPDX-License-Identifier: BSD-3-Clause |
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*/ |
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#include <assert.h> |
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#include <common/debug.h> |
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#include <lib/fconf/fconf.h> |
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#include <lib/fconf/fconf_dyn_cfg_getter.h> |
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#include <plat/arm/common/plat_arm.h> |
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void __init bl31_early_platform_setup2(u_register_t arg0, |
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u_register_t arg1, u_register_t arg2, u_register_t arg3) |
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{ |
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const struct dyn_cfg_dtb_info_t *soc_fw_config_info; |
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INFO("BL31 FCONF: FW_CONFIG address = %lx\n", (uintptr_t)arg1); |
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/* Fill the properties struct with the info from the config dtb */ |
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fconf_populate("FW_CONFIG", arg1); |
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soc_fw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, SOC_FW_CONFIG_ID); |
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if (soc_fw_config_info != NULL) { |
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arg1 = soc_fw_config_info->config_addr; |
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} |
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arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3); |
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/*
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* Initialize Interconnect for this cluster during cold boot. |
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* No need for locks as no other CPU is active. |
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*/ |
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plat_arm_interconnect_init(); |
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/*
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* Enable Interconnect coherency for the primary CPU's cluster. |
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* Earlier bootloader stages might already do this (e.g. Trusted |
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* Firmware's BL1 does it) but we can't assume so. There is no harm in |
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* executing this code twice anyway. |
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* Platform specific PSCI code will enable coherency for other |
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* clusters. |
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*/ |
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plat_arm_interconnect_enter_coherency(); |
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} |
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void __init bl31_plat_arch_setup(void) |
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{ |
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arm_bl31_plat_arch_setup(); |
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/* HW_CONFIG was also loaded by BL2 */ |
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const struct dyn_cfg_dtb_info_t *hw_config_info; |
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hw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, HW_CONFIG_ID); |
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assert(hw_config_info != NULL); |
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fconf_populate("HW_CONFIG", hw_config_info->config_addr); |
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} |
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