Browse Source

plat/arm/juno: Add support to use hw_config in BL31

To make it possible to use the hw_config device tree for dynamic
configuration in BL31 on the Arm Juno platform. A placeholder hw_config
has been added that is included in the FIP and a Juno specific BL31
setup has been added to populate fconf with the hw_config.

Juno's BL2 setup has been updated to align it with the new behavior
implemented in the Arm FVP platform, where fw_config is passed in arg1
to BL31 instead of soc_fw_config. The BL31 setup is expected to use the
fw_config passed in arg1 to find the hw_config.

Signed-off-by: Mikael Olsson <mikael.olsson@arm.com>
Change-Id: Ib3570faa6714f92ab8451e8f1e59779dcf19c0b6
pull/1942/head
Mikael Olsson 4 years ago
committed by Manish Pandey
parent
commit
5d5fb10f9c
  1. 4
      docs/getting_started/porting-guide.rst
  2. 11
      fdts/juno.dts
  3. 8
      plat/arm/board/juno/fdts/juno_fw_config.dts
  4. 12
      plat/arm/board/juno/include/platform_def.h
  5. 42
      plat/arm/board/juno/juno_bl2_setup.c
  6. 60
      plat/arm/board/juno/juno_bl31_setup.c
  7. 3
      plat/arm/board/juno/juno_common.c
  8. 10
      plat/arm/board/juno/platform.mk

4
docs/getting_started/porting-guide.rst

@ -1742,9 +1742,9 @@ In Arm standard platforms, the arguments received are :
which is list of executable images following BL31,
arg1 - Points to load address of SOC_FW_CONFIG if present
except in case of Arm FVP platform.
except in case of Arm FVP and Juno platform.
In case of Arm FVP platform, Points to load address
In case of Arm FVP and Juno platform, points to load address
of FW_CONFIG.
arg2 - Points to load address of HW_CONFIG if present

11
fdts/juno.dts

@ -0,0 +1,11 @@
/*
* Copyright (c) 2021, Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/dts-v1/;
/ {
};

8
plat/arm/board/juno/fdts/juno_fw_config.dts

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2020, ARM Limited. All rights reserved.
* Copyright (c) 2019-2021, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -17,5 +17,11 @@
max-size = <0x200>;
id = <TB_FW_CONFIG_ID>;
};
hw-config {
load-address = <0x0 0x82000000>;
max-size = <0x8000>;
id = <HW_CONFIG_ID>;
};
};
};

12
plat/arm/board/juno/include/platform_def.h

@ -1,5 +1,5 @@
/*
* Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -53,6 +53,14 @@
#define PLAT_ARM_DRAM2_BASE ULL(0x880000000)
#define PLAT_ARM_DRAM2_SIZE ULL(0x180000000)
#define PLAT_HW_CONFIG_DTB_BASE ULL(0x82000000)
#define PLAT_HW_CONFIG_DTB_SIZE ULL(0x00008000) /* 32KB */
#define ARM_DTB_DRAM_NS MAP_REGION_FLAT( \
PLAT_HW_CONFIG_DTB_BASE, \
PLAT_HW_CONFIG_DTB_SIZE, \
MT_MEMORY | MT_RO | MT_NS)
/* virtual address used by dynamic mem_protect for chunk_base */
#define PLAT_ARM_MEM_PROTEC_VA_FRAME UL(0xc0000000)
@ -108,7 +116,7 @@
#ifdef IMAGE_BL31
# define PLAT_ARM_MMAP_ENTRIES 7
# define MAX_XLAT_TABLES 3
# define MAX_XLAT_TABLES 5
#endif
#ifdef IMAGE_BL32

42
plat/arm/board/juno/juno_bl2_setup.c

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2017,2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -8,6 +8,9 @@
#include <common/bl_common.h>
#include <common/desc_image_load.h>
#include <lib/fconf/fconf.h>
#include <lib/fconf/fconf_dyn_cfg_getter.h>
#include <plat/arm/common/plat_arm.h>
#if JUNO_AARCH32_EL3_RUNTIME
@ -30,4 +33,41 @@ int arm_bl2_plat_handle_post_image_load(unsigned int image_id)
return err;
}
#else
/*******************************************************************************
* This function returns the list of executable images
******************************************************************************/
struct bl_params *plat_get_next_bl_params(void)
{
struct bl_params *arm_bl_params = arm_get_next_bl_params();
#if __aarch64__
const struct dyn_cfg_dtb_info_t *fw_config_info;
bl_mem_params_node_t *param_node;
uintptr_t fw_config_base = 0U;
entry_point_info_t *ep_info;
/* Get BL31 image node */
param_node = get_bl_mem_params_node(BL31_IMAGE_ID);
assert(param_node != NULL);
/* Get fw_config load address */
fw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, FW_CONFIG_ID);
assert(fw_config_info != NULL);
fw_config_base = fw_config_info->config_addr;
assert(fw_config_base != 0U);
/*
* Get the entry point info of BL31 image and override
* arg1 of entry point info with fw_config base address
*/
ep_info = &param_node->ep_info;
ep_info->args.arg1 = (uint32_t)fw_config_base;
#endif /* __aarch64__ */
return arm_bl_params;
}
#endif /* JUNO_AARCH32_EL3_RUNTIME */

60
plat/arm/board/juno/juno_bl31_setup.c

@ -0,0 +1,60 @@
/*
* Copyright (c) 2021, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <assert.h>
#include <common/debug.h>
#include <lib/fconf/fconf.h>
#include <lib/fconf/fconf_dyn_cfg_getter.h>
#include <plat/arm/common/plat_arm.h>
void __init bl31_early_platform_setup2(u_register_t arg0,
u_register_t arg1, u_register_t arg2, u_register_t arg3)
{
const struct dyn_cfg_dtb_info_t *soc_fw_config_info;
INFO("BL31 FCONF: FW_CONFIG address = %lx\n", (uintptr_t)arg1);
/* Fill the properties struct with the info from the config dtb */
fconf_populate("FW_CONFIG", arg1);
soc_fw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, SOC_FW_CONFIG_ID);
if (soc_fw_config_info != NULL) {
arg1 = soc_fw_config_info->config_addr;
}
arm_bl31_early_platform_setup((void *)arg0, arg1, arg2, (void *)arg3);
/*
* Initialize Interconnect for this cluster during cold boot.
* No need for locks as no other CPU is active.
*/
plat_arm_interconnect_init();
/*
* Enable Interconnect coherency for the primary CPU's cluster.
* Earlier bootloader stages might already do this (e.g. Trusted
* Firmware's BL1 does it) but we can't assume so. There is no harm in
* executing this code twice anyway.
* Platform specific PSCI code will enable coherency for other
* clusters.
*/
plat_arm_interconnect_enter_coherency();
}
void __init bl31_plat_arch_setup(void)
{
arm_bl31_plat_arch_setup();
/* HW_CONFIG was also loaded by BL2 */
const struct dyn_cfg_dtb_info_t *hw_config_info;
hw_config_info = FCONF_GET_PROPERTY(dyn_cfg, dtb, HW_CONFIG_ID);
assert(hw_config_info != NULL);
fconf_populate("HW_CONFIG", hw_config_info->config_addr);
}

3
plat/arm/board/juno/juno_common.c

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -75,6 +75,7 @@ const mmap_region_t plat_arm_mmap[] = {
ARM_V2M_MAP_MEM_PROTECT,
#endif
SOC_CSS_MAP_DEVICE,
ARM_DTB_DRAM_NS,
{0}
};
#endif

10
plat/arm/board/juno/platform.mk

@ -83,6 +83,10 @@ BL31_SOURCES += drivers/cfi/v2m/v2m_flash.c \
lib/cpus/aarch64/cortex_a57.S \
lib/cpus/aarch64/cortex_a72.S \
lib/utils/mem_region.c \
common/fdt_wrappers.c \
lib/fconf/fconf.c \
lib/fconf/fconf_dyn_cfg_getter.c \
plat/arm/board/juno/juno_bl31_setup.c \
plat/arm/board/juno/juno_pm.c \
plat/arm/board/juno/juno_topology.c \
plat/arm/common/arm_nor_psci_mem_protect.c \
@ -174,15 +178,19 @@ BL32_CPPFLAGS += -march=armv8-a+crc
# Add the FDT_SOURCES and options for Dynamic Config
FDT_SOURCES += plat/arm/board/juno/fdts/${PLAT}_fw_config.dts \
plat/arm/board/juno/fdts/${PLAT}_tb_fw_config.dts
plat/arm/board/juno/fdts/${PLAT}_tb_fw_config.dts \
fdts/${PLAT}.dts
FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb
HW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}.dtb
# Add the FW_CONFIG to FIP and specify the same to certtool
$(eval $(call TOOL_ADD_PAYLOAD,${FW_CONFIG},--fw-config,${FW_CONFIG}))
# Add the TB_FW_CONFIG to FIP and specify the same to certtool
$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config,${TB_FW_CONFIG}))
# Add the HW_CONFIG to FIP and specify the same to certtool
$(eval $(call TOOL_ADD_PAYLOAD,${HW_CONFIG},--hw-config,${HW_CONFIG}))
include plat/arm/board/common/board_common.mk
include plat/arm/common/arm_common.mk

Loading…
Cancel
Save