Merge "build(bl32): added check for AARCH32_SP" into integration

Makefile

@@ -768,8 +768,8 @@ ifeq (${ARCH},aarch32)
                 ifeq (${AARCH32_SP_MAKE},)
                         $(error Error: No bl32/${AARCH32_SP}/${AARCH32_SP}.mk located)
                 endif
-        $(info Including ${AARCH32_SP_MAKE})
-        include ${AARCH32_SP_MAKE}
+                $(info Including ${AARCH32_SP_MAKE})
+                include ${AARCH32_SP_MAKE}
         endif
 endif #(ARCH=aarch32)
 

plat/arm/board/a5ds/platform.mk

@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2019-2021, Arm Limited. All rights reserved.
+# Copyright (c) 2019-2023, Arm Limited. All rights reserved.
 #
 # SPDX-License-Identifier: BSD-3-Clause
 #
@@ -98,6 +98,10 @@ endif
 
 NEED_BL32 := yes
 
+ifeq (${AARCH32_SP},none)
+    $(error Variable AARCH32_SP has to be set for AArch32)
+endif
+
 MULTI_CONSOLE_API		:=	1
 
 ARM_DISABLE_TRUSTED_WDOG	:=	1

plat/arm/board/corstone700/platform.mk

@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2019-2022, Arm Limited and Contributors. All rights reserved.
+# Copyright (c) 2019-2023, Arm Limited and Contributors. All rights reserved.
 #
 # SPDX-License-Identifier: BSD-3-Clause
 #
@@ -25,6 +25,10 @@ PLAT_INCLUDES		:=	-Iplat/arm/board/corstone700/common/include	\
 
 NEED_BL32		:=	yes
 
+ifeq (${AARCH32_SP},none)
+    $(error Variable AARCH32_SP has to be set for AArch32)
+endif
+
 # Include GICv2 driver files
 include drivers/arm/gic/v2/gicv2.mk
 

plat/arm/board/fvp/platform.mk

@@ -407,10 +407,6 @@ ifneq (${ENABLE_STACK_PROTECTOR},0)
 PLAT_BL_COMMON_SOURCES	+=	plat/arm/board/fvp/fvp_stack_protector.c
 endif
 
-ifeq (${ARCH},aarch32)
-    NEED_BL32 := yes
-endif
-
 # Enable the dynamic translation tables library.
 ifeq ($(filter 1,${RESET_TO_BL2} ${ARM_XLAT_TABLES_LIB_V1}),)
     ifeq (${ARCH},aarch32)

plat/arm/board/fvp_ve/platform.mk

@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2019-2021, Arm Limited. All rights reserved.
+# Copyright (c) 2019-2023, Arm Limited. All rights reserved.
 #
 # SPDX-License-Identifier: BSD-3-Clause
 #
@@ -96,6 +96,10 @@ endif
 
 NEED_BL32 := yes
 
+ifeq (${AARCH32_SP},none)
+    $(error Variable AARCH32_SP has to be set for AArch32)
+endif
+
 # Modification of arm_common.mk
 
 # Process ARM_DISABLE_TRUSTED_WDOG flag

plat/arm/common/arm_common.mk

@@ -6,6 +6,12 @@
 
 include common/fdt_wrappers.mk
 
+ifeq (${ARCH},aarch32)
+    ifeq (${AARCH32_SP},none)
+        $(error Variable AARCH32_SP has to be set for AArch32)
+    endif
+endif
+
 ifeq (${ARCH}, aarch64)
   # On ARM standard platorms, the TSP can execute from Trusted SRAM, Trusted
   # DRAM (if available) or the TZC secured area of DRAM.

plat/imx/imx7/common/imx7.mk

@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2018-2022, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2018-2023, Arm Limited and Contributors. All rights reserved.
 #
 # SPDX-License-Identifier: BSD-3-Clause
 #
@@ -110,3 +110,7 @@ endif
 ifeq (${ARCH},aarch64)
   $(error Error: AArch64 not supported on i.mx7)
 endif
+
+ifeq (${AARCH32_SP}, none)
+    $(error Variable AARCH32_SP has to be set for AArch32)
+endif

plat/qti/msm8916/platform.mk

@@ -75,11 +75,14 @@ BL31_BASE			?= 0x86500000
 PRELOADED_BL33_BASE		?= 0x8f600000
 
 ifeq (${ARCH},aarch64)
-BL32_BASE			?= BL31_LIMIT
-$(eval $(call add_define,BL31_BASE))
+    BL32_BASE			?= BL31_LIMIT
+    $(eval $(call add_define,BL31_BASE))
 else
-# There is no BL31 on aarch32, so reuse its location for BL32
-BL32_BASE			?= $(BL31_BASE)
+    ifeq (${AARCH32_SP},none)
+	$(error Variable AARCH32_SP has to be set for AArch32)
+    endif
+    # There is no BL31 on aarch32, so reuse its location for BL32
+    BL32_BASE			?= $(BL31_BASE)
 endif
 $(eval $(call add_define,BL32_BASE))
 

plat/rockchip/rk3288/platform.mk

@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2016-2023, Arm Limited and Contributors. All rights reserved.
 #
 # SPDX-License-Identifier: BSD-3-Clause
 #
@@ -67,3 +67,7 @@ $(eval $(call add_define,PLAT_SP_MIN_EXTRA_LD_SCRIPT))
 ENABLE_SVE_FOR_NS	:=	0
 
 WORKAROUND_CVE_2017_5715	:=	0
+
+ifeq (${AARCH32_SP}, none)
+    $(error Variable AARCH32_SP has to be set for AArch32)
+endif