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@ -1,5 +1,5 @@ |
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/* |
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* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved. |
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* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved. |
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* |
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* Redistribution and use in source and binary forms, with or without |
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* modification, are permitted provided that the following conditions are met: |
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@ -391,7 +391,7 @@ tsp_sel1_intr_return: |
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/* Should never reach here */ |
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tsp_sel1_int_entry_panic: |
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b tsp_sel1_int_entry_panic |
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bl plat_panic_handler |
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endfunc tsp_sel1_intr_entry |
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/*--------------------------------------------- |
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@ -407,8 +407,9 @@ endfunc tsp_sel1_intr_entry |
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func tsp_cpu_resume_entry |
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bl tsp_cpu_resume_main |
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restore_args_call_smc |
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tsp_cpu_resume_panic: |
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b tsp_cpu_resume_panic |
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/* Should never reach here */ |
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bl plat_panic_handler |
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endfunc tsp_cpu_resume_entry |
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/*--------------------------------------------- |
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@ -419,8 +420,9 @@ endfunc tsp_cpu_resume_entry |
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func tsp_fast_smc_entry |
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bl tsp_smc_handler |
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restore_args_call_smc |
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tsp_fast_smc_entry_panic: |
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b tsp_fast_smc_entry_panic |
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/* Should never reach here */ |
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bl plat_panic_handler |
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endfunc tsp_fast_smc_entry |
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/*--------------------------------------------- |
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@ -435,6 +437,7 @@ func tsp_std_smc_entry |
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bl tsp_smc_handler |
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msr daifset, #DAIF_FIQ_BIT | DAIF_IRQ_BIT |
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restore_args_call_smc |
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tsp_std_smc_entry_panic: |
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b tsp_std_smc_entry_panic |
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/* Should never reach here */ |
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bl plat_panic_handler |
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endfunc tsp_std_smc_entry |
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