diff --git a/plat/arm/board/tc/platform.mk b/plat/arm/board/tc/platform.mk
index c6a82deef..7fdc4fd84 100644
--- a/plat/arm/board/tc/platform.mk
+++ b/plat/arm/board/tc/platform.mk
@@ -41,7 +41,7 @@ GIC_ENABLE_V4_EXTN	:=      1
 GICV3_SUPPORT_GIC600	:=	1
 
 # Enable SVE
-ENABLE_SVE_FOR_NS	:=	1
+ENABLE_SVE_FOR_NS	:=	2
 ENABLE_SVE_FOR_SWD	:=	1
 
 # enable trace buffer control registers access to NS by default
diff --git a/plat/qemu/qemu/platform.mk b/plat/qemu/qemu/platform.mk
index c076aba0d..3a0e1c017 100644
--- a/plat/qemu/qemu/platform.mk
+++ b/plat/qemu/qemu/platform.mk
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2013-2022, ARM Limited and Contributors. All rights reserved.
+# Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved.
 #
 # SPDX-License-Identifier: BSD-3-Clause
 #
@@ -306,8 +306,8 @@ ENABLE_FEAT_RNG			:= 2
 
 # Later QEMU versions support SME and SVE.
 ifneq (${ARCH},aarch32)
-	ENABLE_SVE_FOR_NS	:= 1
-	ENABLE_SME_FOR_NS	:= 1
+	ENABLE_SVE_FOR_NS	:= 2
+	ENABLE_SME_FOR_NS	:= 2
 endif
 
 qemu_fw.bios: bl1 fip
diff --git a/plat/qemu/qemu_sbsa/platform.mk b/plat/qemu/qemu_sbsa/platform.mk
index fec83db56..7b3129c3b 100644
--- a/plat/qemu/qemu_sbsa/platform.mk
+++ b/plat/qemu/qemu_sbsa/platform.mk
@@ -137,5 +137,5 @@ ARM_PRELOADED_DTB_BASE := PLAT_QEMU_DT_BASE
 $(eval $(call add_define,ARM_PRELOADED_DTB_BASE))
 
 # Later QEMU versions support SME and SVE.
-ENABLE_SVE_FOR_NS	:= 1
-ENABLE_SME_FOR_NS	:= 1
+ENABLE_SVE_FOR_NS	:= 2
+ENABLE_SME_FOR_NS	:= 2