Manish Pandey
3 years ago
committed by
TrustedFirmware Code Review
14 changed files with 110 additions and 459 deletions
@ -1,91 +0,0 @@ |
|||
/*
|
|||
* Copyright (c) 2021, ARM Limited and Contributors. All rights reserved. |
|||
* |
|||
* SPDX-License-Identifier: BSD-3-Clause |
|||
*/ |
|||
|
|||
#include <assert.h> |
|||
|
|||
#include "../../../../bl1/bl1_private.h" |
|||
#include <arch_helpers.h> |
|||
#include <common/debug.h> |
|||
#include <context.h> |
|||
#include <lib/el3_runtime/context_mgmt.h> |
|||
|
|||
#include <plat/common/platform.h> |
|||
|
|||
|
|||
void cm_prepare_el2_exit(void); |
|||
|
|||
/* Following contains the cpu context pointers. */ |
|||
static void *bl1_cpu_context_ptr[2]; |
|||
|
|||
void *cm_get_context(uint32_t security_state) |
|||
{ |
|||
assert(sec_state_is_valid(security_state)); |
|||
return bl1_cpu_context_ptr[security_state]; |
|||
} |
|||
|
|||
void cm_set_context(void *context, uint32_t security_state) |
|||
{ |
|||
assert(sec_state_is_valid(security_state)); |
|||
bl1_cpu_context_ptr[security_state] = context; |
|||
} |
|||
|
|||
/*******************************************************************************
|
|||
* This function prepares the context for Secure/Normal world images. |
|||
* Normal world images are transitioned to EL2(if supported) else EL1. |
|||
******************************************************************************/ |
|||
void bl1_prepare_next_image(unsigned int image_id) |
|||
{ |
|||
/*
|
|||
* Following array will be used for context management. |
|||
* There are 2 instances, for the Secure and Non-Secure contexts. |
|||
*/ |
|||
static cpu_context_t bl1_cpu_context[2]; |
|||
|
|||
unsigned int security_state, mode = MODE_EL1; |
|||
image_desc_t *desc; |
|||
entry_point_info_t *next_bl_ep; |
|||
|
|||
#if CTX_INCLUDE_AARCH32_REGS |
|||
/*
|
|||
* Ensure that the build flag to save AArch32 system registers in CPU |
|||
* context is not set for AArch64-only platforms. |
|||
*/ |
|||
if (el_implemented(1) == EL_IMPL_A64ONLY) { |
|||
ERROR("EL1 supports AArch64-only. Please set build flag %s", |
|||
"CTX_INCLUDE_AARCH32_REGS = 0\n"); |
|||
panic(); |
|||
} |
|||
#endif |
|||
|
|||
/* Get the image descriptor. */ |
|||
desc = bl1_plat_get_image_desc(image_id); |
|||
assert(desc != NULL); |
|||
|
|||
/* Get the entry point info. */ |
|||
next_bl_ep = &desc->ep_info; |
|||
|
|||
/* Get the image security state. */ |
|||
security_state = GET_SECURITY_STATE(next_bl_ep->h.attr); |
|||
|
|||
/* Setup the Secure/Non-Secure context if not done already. */ |
|||
if (cm_get_context(security_state) == NULL) { |
|||
cm_set_context(&bl1_cpu_context[security_state], security_state); |
|||
} |
|||
/* Prepare the SPSR for the next BL image. */ |
|||
next_bl_ep->spsr = (uint32_t)SPSR_64((uint64_t) mode, |
|||
(uint64_t)MODE_SP_ELX, DISABLE_ALL_EXCEPTIONS); |
|||
|
|||
/* Allow platform to make change */ |
|||
bl1_plat_set_ep_info(image_id, next_bl_ep); |
|||
|
|||
/* Prepare context for the next EL */ |
|||
cm_prepare_el2_exit(); |
|||
|
|||
/* Indicate that image is in execution state. */ |
|||
desc->state = IMAGE_STATE_EXECUTED; |
|||
|
|||
print_entry_point_info(next_bl_ep); |
|||
} |
@ -1,17 +0,0 @@ |
|||
/* |
|||
* Copyright (c) 2021, ARM Limited and Contributors. All rights reserved. |
|||
* |
|||
* SPDX-License-Identifier: BSD-3-Clause |
|||
*/ |
|||
|
|||
#include <asm_macros.S> |
|||
|
|||
.global el2_exit |
|||
|
|||
/* ------------------------------------------------------------------ |
|||
* The mechanism, from el3_exit, is not used in this v8-R64 implementation. |
|||
* ------------------------------------------------------------------ |
|||
*/ |
|||
func el2_exit |
|||
exception_return |
|||
endfunc el2_exit |
@ -1,59 +0,0 @@ |
|||
/* |
|||
* Copyright (c) 2021, Arm Limited. All rights reserved. |
|||
* |
|||
* SPDX-License-Identifier: BSD-3-Clause |
|||
*/ |
|||
|
|||
#include <arch.h> |
|||
#include <asm_macros.S> |
|||
#include <lib/el3_runtime/cpu_data.h> |
|||
|
|||
.global pauth_init_enable_el2 |
|||
.global pauth_disable_el2 |
|||
|
|||
/* ------------------------------------------------------------- |
|||
* File contains EL2 versions of EL3 funcs in: |
|||
* .../lib/extensions/pauth/pauth_helpers.S |
|||
* ------------------------------------------------------------- |
|||
*/ |
|||
|
|||
/* ------------------------------------------------------------- |
|||
* Program APIAKey_EL1 and enable pointer authentication in EL2 |
|||
* ------------------------------------------------------------- |
|||
*/ |
|||
func pauth_init_enable_el2 |
|||
stp x29, x30, [sp, #-16]! |
|||
|
|||
/* Initialize platform key */ |
|||
bl plat_init_apkey |
|||
|
|||
/* Program instruction key A used by the Trusted Firmware */ |
|||
msr APIAKeyLo_EL1, x0 |
|||
msr APIAKeyHi_EL1, x1 |
|||
|
|||
/* Enable pointer authentication */ |
|||
mrs x0, sctlr_el2 |
|||
orr x0, x0, #SCTLR_EnIA_BIT |
|||
|
|||
#if ENABLE_BTI |
|||
/* Enable PAC branch type compatibility */ |
|||
bic x0, x0, #SCTLR_BT_BIT |
|||
#endif |
|||
msr sctlr_el2, x0 |
|||
isb |
|||
|
|||
ldp x29, x30, [sp], #16 |
|||
ret |
|||
endfunc pauth_init_enable_el2 |
|||
|
|||
/* ------------------------------------------------------------- |
|||
* Disable pointer authentication in EL2 |
|||
* ------------------------------------------------------------- |
|||
*/ |
|||
func pauth_disable_el2 |
|||
mrs x0, sctlr_el2 |
|||
bic x0, x0, #SCTLR_EnIA_BIT |
|||
msr sctlr_el2, x0 |
|||
isb |
|||
ret |
|||
endfunc pauth_disable_el2 |
@ -1,11 +0,0 @@ |
|||
/* |
|||
* Copyright (c) 2021, ARM Limited and Contributors. All rights reserved. |
|||
* |
|||
* SPDX-License-Identifier: BSD-3-Clause |
|||
*/ |
|||
#ifndef PLAT_LD_S |
|||
#define PLAT_LD_S |
|||
|
|||
#include <plat/arm/common/arm_tzc_dram.ld.S> |
|||
|
|||
#endif /* PLAT_LD_S */ |
Loading…
Reference in new issue