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mediatek: mt8183: add timer V20 compensation

add timer driver.

Signed-off-by: Fengquan Chen <fengquan.chen@mediatek.com>
Change-Id: I60a7273f922233a618a6163b802c0858ed89f75f
pull/1939/head
Fengquan Chen 4 years ago
parent
commit
774ba5a23d
  1. 3
      plat/mediatek/mt8183/bl31_plat_setup.c
  2. 29
      plat/mediatek/mt8183/drivers/timer/mt_timer.c
  3. 20
      plat/mediatek/mt8183/drivers/timer/mt_timer.h
  4. 2
      plat/mediatek/mt8183/platform.mk

3
plat/mediatek/mt8183/bl31_plat_setup.c

@ -16,6 +16,7 @@
#include <drivers/generic_delay_timer.h> #include <drivers/generic_delay_timer.h>
#include <mcucfg.h> #include <mcucfg.h>
#include <mt_gic_v3.h> #include <mt_gic_v3.h>
#include <mt_timer.h>
#include <lib/coreboot.h> #include <lib/coreboot.h>
#include <lib/mmio.h> #include <lib/mmio.h>
#include <mtk_mcdi.h> #include <mtk_mcdi.h>
@ -148,6 +149,8 @@ void bl31_platform_setup(void)
mt_gic_driver_init(); mt_gic_driver_init();
mt_gic_init(); mt_gic_init();
mt_systimer_init();
/* Init mcsi SF */ /* Init mcsi SF */
plat_mtk_cci_init_sf(); plat_mtk_cci_init_sf();

29
plat/mediatek/mt8183/drivers/timer/mt_timer.c

@ -0,0 +1,29 @@
/*
* Copyright (c) 2020, MediaTek Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <arch_helpers.h>
#include <common/debug.h>
#include <lib/mmio.h>
#include <mcucfg.h>
#include <mt_timer.h>
#include <platform_def.h>
static void enable_systimer_compensation(void)
{
unsigned int reg;
reg = mmio_read_32(CNTCR_REG);
reg &= ~COMP_15_EN;
reg |= COMP_20_EN;
mmio_write_32(CNTCR_REG, reg);
NOTICE("[systimer] CNTCR_REG(0x%x)\n", mmio_read_32(CNTCR_REG));
}
void mt_systimer_init(void)
{
/* systimer is default on, so we only enable systimer compensation */
enable_systimer_compensation();
}

20
plat/mediatek/mt8183/drivers/timer/mt_timer.h

@ -0,0 +1,20 @@
/*
* Copyright (c) 2020, MediaTek Inc. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#ifndef MT_TIMER_H
#define MT_TIMER_H
#define SYSTIMER_BASE (0x10017000)
#define CNTCR_REG (SYSTIMER_BASE + 0x0)
#define CNTSR_REG (SYSTIMER_BASE + 0x4)
#define COMP_15_EN (1 << 10)
#define COMP_20_EN (1 << 11)
void mt_systimer_init(void);
#endif /* MT_TIMER_H */

2
plat/mediatek/mt8183/platform.mk

@ -14,6 +14,7 @@ PLAT_INCLUDES := -I${MTK_PLAT}/common/ \
-I${MTK_PLAT_SOC}/drivers/mcdi/ \ -I${MTK_PLAT_SOC}/drivers/mcdi/ \
-I${MTK_PLAT_SOC}/drivers/spmc/ \ -I${MTK_PLAT_SOC}/drivers/spmc/ \
-I${MTK_PLAT_SOC}/drivers/gpio/ \ -I${MTK_PLAT_SOC}/drivers/gpio/ \
-I${MTK_PLAT_SOC}/drivers/timer/ \
-I${MTK_PLAT_SOC}/drivers/pmic/ \ -I${MTK_PLAT_SOC}/drivers/pmic/ \
-I${MTK_PLAT_SOC}/drivers/spm/ \ -I${MTK_PLAT_SOC}/drivers/spm/ \
-I${MTK_PLAT_SOC}/drivers/sspm/ \ -I${MTK_PLAT_SOC}/drivers/sspm/ \
@ -58,6 +59,7 @@ BL31_SOURCES += common/desc_image_load.c \
${MTK_PLAT_SOC}/drivers/spm/spm_suspend.c \ ${MTK_PLAT_SOC}/drivers/spm/spm_suspend.c \
${MTK_PLAT_SOC}/drivers/gpio/mtgpio.c \ ${MTK_PLAT_SOC}/drivers/gpio/mtgpio.c \
${MTK_PLAT_SOC}/drivers/uart/uart.c \ ${MTK_PLAT_SOC}/drivers/uart/uart.c \
${MTK_PLAT_SOC}/drivers/timer/mt_timer.c \
${MTK_PLAT_SOC}/drivers/emi_mpu/emi_mpu.c \ ${MTK_PLAT_SOC}/drivers/emi_mpu/emi_mpu.c \
${MTK_PLAT_SOC}/plat_pm.c \ ${MTK_PLAT_SOC}/plat_pm.c \
${MTK_PLAT_SOC}/plat_topology.c \ ${MTK_PLAT_SOC}/plat_topology.c \

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