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Merge changes from topic "st-format-signedness" into integration

* changes:
  feat(stm32mp1): enable format-signedness warning
  fix(stm32mp1): correct types in messages
  fix(st-pmic): correct verbose message
  fix(st-sdmmc2): correct cmd_idx type in messages
  fix(st-fmc): fix type in message
  fix(mtd): correct types in messages
  fix(usb): correct type in message
  fix(tzc400): correct message with filter
  fix(psci): correct parent_node type in messages
  fix(libc): correct some messages
  fix(fconf): correct image_id type in messages
  fix(bl2): correct messages with image_id
pull/1983/merge
Madhukar Pappireddy 3 years ago
committed by TrustedFirmware Code Review
parent
commit
8d9c1b3ca5
  1. 13
      bl2/bl2_image_load_v2.c
  2. 6
      drivers/arm/tzc/tzc400.c
  3. 8
      drivers/io/io_mtd.c
  4. 10
      drivers/mtd/nand/spi_nand.c
  5. 4
      drivers/mtd/nor/spi_nor.c
  6. 9
      drivers/mtd/spi-mem/spi_mem.c
  7. 11
      drivers/st/fmc/stm32_fmc2_nand.c
  8. 10
      drivers/st/mmc/stm32_sdmmc2.c
  9. 4
      drivers/st/pmic/stm32mp_pmic.c
  10. 4
      drivers/usb/usb_device.c
  11. 10
      lib/fconf/fconf.c
  12. 6
      lib/libc/assert.c
  13. 4
      lib/libc/snprintf.c
  14. 6
      lib/psci/psci_common.c
  15. 1
      plat/st/stm32mp1/platform.mk
  16. 4
      plat/st/stm32mp1/stm32mp1_boot_device.c
  17. 7
      plat/st/stm32mp1/stm32mp1_shared_resources.c

13
bl2/bl2_image_load_v2.c

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -7,17 +7,16 @@
#include <assert.h>
#include <stdint.h>
#include <platform_def.h>
#include <arch.h>
#include <arch_helpers.h>
#include "bl2_private.h"
#include <common/bl_common.h>
#include <common/debug.h>
#include <common/desc_image_load.h>
#include <drivers/auth/auth_mod.h>
#include <plat/common/platform.h>
#include "bl2_private.h"
#include <platform_def.h>
/*******************************************************************************
* This function loads SCP_BL2/BL3x images and returns the ep_info for
@ -66,16 +65,16 @@ struct entry_point_info *bl2_load_images(void)
if ((bl2_node_info->image_info->h.attr &
IMAGE_ATTRIB_SKIP_LOADING) == 0U) {
INFO("BL2: Loading image id %d\n", bl2_node_info->image_id);
INFO("BL2: Loading image id %u\n", bl2_node_info->image_id);
err = load_auth_image(bl2_node_info->image_id,
bl2_node_info->image_info);
if (err != 0) {
ERROR("BL2: Failed to load image id %d (%i)\n",
ERROR("BL2: Failed to load image id %u (%i)\n",
bl2_node_info->image_id, err);
plat_error_handler(err);
}
} else {
INFO("BL2: Skip loading image id %d\n", bl2_node_info->image_id);
INFO("BL2: Skip loading image id %u\n", bl2_node_info->image_id);
}
/* Allow platform to handle image information. */

6
drivers/arm/tzc/tzc400.c

@ -1,5 +1,5 @@
/*
* Copyright (c) 2016-2021, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2016-2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -306,8 +306,8 @@ void tzc400_enable_filters(void)
* See the 'ARM (R) CoreLink TM TZC-400 TrustZone (R)
* Address Space Controller' Technical Reference Manual.
*/
ERROR("TZC-400 : Filter %d Gatekeeper already"
" enabled.\n", filter);
ERROR("TZC-400 : Filter %u Gatekeeper already enabled.\n",
filter);
panic();
}
_tzc400_set_gate_keeper(tzc400.base, filter, 1);

8
drivers/io/io_mtd.c

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2021, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2019-2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -8,13 +8,13 @@
#include <errno.h>
#include <string.h>
#include <platform_def.h>
#include <common/debug.h>
#include <drivers/io/io_driver.h>
#include <drivers/io/io_mtd.h>
#include <lib/utils.h>
#include <platform_def.h>
typedef struct {
io_mtd_dev_spec_t *dev_spec;
uintptr_t base;
@ -214,7 +214,7 @@ static int mtd_read(io_entity_t *entity, uintptr_t buffer, size_t length,
ops = &cur->dev_spec->ops;
assert(ops->read != NULL);
VERBOSE("Read at %llx into %lx, length %zi\n",
VERBOSE("Read at %llx into %lx, length %zu\n",
cur->base + cur->pos, buffer, length);
if ((cur->base + cur->pos + length) > cur->dev_spec->device_size) {
return -EINVAL;

10
drivers/mtd/nand/spi_nand.c

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2021, STMicroelectronics - All Rights Reserved
* Copyright (c) 2019-2022, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -8,13 +8,13 @@
#include <errno.h>
#include <stddef.h>
#include <platform_def.h>
#include <common/debug.h>
#include <drivers/delay_timer.h>
#include <drivers/spi_nand.h>
#include <lib/utils.h>
#include <platform_def.h>
#define SPI_NAND_MAX_ID_LEN 4U
#define DELAY_US_400MS 400000U
#define MACRONIX_ID 0xC2U
@ -246,7 +246,7 @@ static int spi_nand_mtd_block_is_bad(unsigned int block)
if ((bbm_marker[0] != GENMASK_32(7, 0)) ||
(bbm_marker[1] != GENMASK_32(7, 0))) {
WARN("Block %i is bad\n", block);
WARN("Block %u is bad\n", block);
return 1;
}
@ -312,7 +312,7 @@ int spi_nand_init(unsigned long long *size, unsigned int *erase_size)
VERBOSE("SPI_NAND Detected ID 0x%x\n", id[1]);
VERBOSE("Page size %i, Block size %i, size %lli\n",
VERBOSE("Page size %u, Block size %u, size %llu\n",
spinand_dev.nand_dev->page_size,
spinand_dev.nand_dev->block_size,
spinand_dev.nand_dev->size);

4
drivers/mtd/nor/spi_nor.c

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2021, STMicroelectronics - All Rights Reserved
* Copyright (c) 2019-2022, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -284,7 +284,7 @@ int spi_nor_read(unsigned int offset, uintptr_t buffer, size_t length,
nor_dev.read_op.addr.val = offset;
nor_dev.read_op.data.buf = (void *)buffer;
VERBOSE("%s offset %i length %zu\n", __func__, offset, length);
VERBOSE("%s offset %u length %zu\n", __func__, offset, length);
while (length != 0U) {
if ((nor_dev.flags & SPI_NOR_USE_BANK) != 0U) {

9
drivers/mtd/spi-mem/spi_mem.c

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019, STMicroelectronics - All Rights Reserved
* Copyright (c) 2019-2022, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -8,10 +8,9 @@
#include <inttypes.h>
#include <stdint.h>
#include <libfdt.h>
#include <drivers/spi_mem.h>
#include <lib/utils_def.h>
#include <libfdt.h>
#define SPI_MEM_DEFAULT_SPEED_HZ 100000U
@ -258,7 +257,7 @@ int spi_mem_init_slave(void *fdt, int bus_node, const struct spi_bus_ops *ops)
mode |= SPI_TX_QUAD;
break;
default:
WARN("spi-tx-bus-width %d not supported\n",
WARN("spi-tx-bus-width %u not supported\n",
fdt32_to_cpu(*cuint));
return -EINVAL;
}
@ -276,7 +275,7 @@ int spi_mem_init_slave(void *fdt, int bus_node, const struct spi_bus_ops *ops)
mode |= SPI_RX_QUAD;
break;
default:
WARN("spi-rx-bus-width %d not supported\n",
WARN("spi-rx-bus-width %u not supported\n",
fdt32_to_cpu(*cuint));
return -EINVAL;
}

11
drivers/st/fmc/stm32_fmc2_nand.c

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2021, STMicroelectronics - All Rights Reserved
* Copyright (c) 2019-2022, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
*/
@ -9,10 +9,6 @@
#include <limits.h>
#include <stdint.h>
#include <libfdt.h>
#include <platform_def.h>
#include <common/debug.h>
#include <drivers/clk.h>
#include <drivers/delay_timer.h>
@ -22,6 +18,9 @@
#include <drivers/st/stm32mp_reset.h>
#include <lib/mmio.h>
#include <lib/utils_def.h>
#include <libfdt.h>
#include <platform_def.h>
/* Timeout for device interface reset */
#define TIMEOUT_US_1_MS 1000U
@ -516,7 +515,7 @@ static int stm32_fmc2_read_page(struct nand_device *nand,
unsigned int s;
int ret;
VERBOSE(">%s page %i buffer %lx\n", __func__, page, buffer);
VERBOSE(">%s page %u buffer %lx\n", __func__, page, buffer);
ret = nand_read_page_cmd(page, 0U, 0U, 0U);
if (ret != 0) {

10
drivers/st/mmc/stm32_sdmmc2.c

@ -319,7 +319,7 @@ static int stm32_sdmmc2_send_cmd_req(struct mmc_cmd *cmd)
while ((status & flags_cmd) == 0U) {
if (timeout_elapsed(timeout)) {
err = -ETIMEDOUT;
ERROR("%s: timeout 10ms (cmd = %d,status = %x)\n",
ERROR("%s: timeout 10ms (cmd = %u,status = %x)\n",
__func__, cmd->cmd_idx, status);
goto err_exit;
}
@ -339,12 +339,12 @@ static int stm32_sdmmc2_send_cmd_req(struct mmc_cmd *cmd)
(cmd->cmd_idx == MMC_CMD(13)) ||
((cmd->cmd_idx == MMC_CMD(8)) &&
(cmd->resp_type == MMC_RESPONSE_R7)))) {
ERROR("%s: CTIMEOUT (cmd = %d,status = %x)\n",
ERROR("%s: CTIMEOUT (cmd = %u,status = %x)\n",
__func__, cmd->cmd_idx, status);
}
} else {
err = -EIO;
ERROR("%s: CRCFAIL (cmd = %d,status = %x)\n",
ERROR("%s: CRCFAIL (cmd = %u,status = %x)\n",
__func__, cmd->cmd_idx, status);
}
@ -385,7 +385,7 @@ static int stm32_sdmmc2_send_cmd_req(struct mmc_cmd *cmd)
while ((status & flags_data) == 0U) {
if (timeout_elapsed(timeout)) {
ERROR("%s: timeout 10ms (cmd = %d,status = %x)\n",
ERROR("%s: timeout 10ms (cmd = %u,status = %x)\n",
__func__, cmd->cmd_idx, status);
err = -ETIMEDOUT;
goto err_exit;
@ -397,7 +397,7 @@ static int stm32_sdmmc2_send_cmd_req(struct mmc_cmd *cmd)
if ((status & (SDMMC_STAR_DTIMEOUT | SDMMC_STAR_DCRCFAIL |
SDMMC_STAR_TXUNDERR | SDMMC_STAR_RXOVERR |
SDMMC_STAR_IDMATE)) != 0U) {
ERROR("%s: Error flag (cmd = %d,status = %x)\n", __func__,
ERROR("%s: Error flag (cmd = %u,status = %x)\n", __func__,
cmd->cmd_idx, status);
err = -EIO;
}

4
drivers/st/pmic/stm32mp_pmic.c

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2021, STMicroelectronics - All Rights Reserved
* Copyright (c) 2017-2022, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -337,7 +337,7 @@ enum {
static int pmic_set_state(const struct regul_description *desc, bool enable)
{
VERBOSE("%s: set state to %u\n", desc->node_name, enable);
VERBOSE("%s: set state to %d\n", desc->node_name, enable);
if (enable == STATE_ENABLE) {
return stpmic1_regulator_enable(desc->node_name);

4
drivers/usb/usb_device.c

@ -1,5 +1,5 @@
/*
* Copyright (c) 2021, STMicroelectronics - All Rights Reserved
* Copyright (c) 2021-2022, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -362,7 +362,7 @@ static enum usb_status usb_core_setup_stage(struct usb_handle *pdev,
case USB_REQ_RECIPIENT_ENDPOINT:
default:
ERROR("receive unsupported request %i",
ERROR("receive unsupported request %u",
pdev->request.bm_request & USB_REQ_RECIPIENT_MASK);
usb_core_set_stall(pdev, pdev->request.bm_request & USB_REQ_DIRECTION);
return USBD_FAIL;

10
lib/fconf/fconf.c

@ -1,5 +1,5 @@
/*
* Copyright (c) 2019-2020, ARM Limited. All rights reserved.
* Copyright (c) 2019-2022, ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -34,15 +34,15 @@ int fconf_load_config(unsigned int image_id)
config_image_info.image_base = config_info->config_addr;
config_image_info.image_max_size = config_info->config_max_size;
VERBOSE("FCONF: Loading config with image ID: %d\n", image_id);
VERBOSE("FCONF: Loading config with image ID: %u\n", image_id);
err = load_auth_image(image_id, &config_image_info);
if (err != 0) {
VERBOSE("Failed to load config %d\n", image_id);
VERBOSE("Failed to load config %u\n", image_id);
return err;
}
INFO("FCONF: Config file with image ID:%d loaded at address = 0x%lx\n",
image_id, config_image_info.image_base);
INFO("FCONF: Config file with image ID:%u loaded at address = 0x%lx\n",
image_id, config_image_info.image_base);
return 0;
}

6
lib/libc/assert.c

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -21,7 +21,7 @@
void __dead2 __assert(const char *file, unsigned int line,
const char *assertion)
{
printf("ASSERT: %s:%d:%s\n", file, line, assertion);
printf("ASSERT: %s:%u:%s\n", file, line, assertion);
backtrace("assert");
console_flush();
plat_panic_handler();
@ -29,7 +29,7 @@ void __dead2 __assert(const char *file, unsigned int line,
#elif PLAT_LOG_LEVEL_ASSERT >= LOG_LEVEL_INFO
void __dead2 __assert(const char *file, unsigned int line)
{
printf("ASSERT: %s:%d\n", file, line);
printf("ASSERT: %s:%u\n", file, line);
backtrace("assert");
console_flush();
plat_panic_handler();

4
lib/libc/snprintf.c

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2021, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -42,7 +42,7 @@ static void unsigned_num_print(char **s, size_t n, size_t *chars_printed,
char ascii_a = capitalise ? 'A' : 'a';
if (radix < 10) {
ERROR("snprintf: unsupported radix '%d'.", radix);
ERROR("snprintf: unsupported radix '%u'.", radix);
plat_panic_handler();
assert(0); /* Unreachable */
}

6
lib/psci/psci_common.c

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2022, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -908,7 +908,7 @@ void psci_print_power_domain_map(void)
idx++) {
state_type = find_local_state_type(
psci_non_cpu_pd_nodes[idx].local_state);
INFO(" Domain Node : Level %u, parent_node %d,"
INFO(" Domain Node : Level %u, parent_node %u,"
" State %s (0x%x)\n",
psci_non_cpu_pd_nodes[idx].level,
psci_non_cpu_pd_nodes[idx].parent_node,
@ -919,7 +919,7 @@ void psci_print_power_domain_map(void)
for (idx = 0; idx < psci_plat_core_count; idx++) {
state = psci_get_cpu_local_state_by_idx(idx);
state_type = find_local_state_type(state);
INFO(" CPU Node : MPID 0x%llx, parent_node %d,"
INFO(" CPU Node : MPID 0x%llx, parent_node %u,"
" State %s (0x%x)\n",
(unsigned long long)psci_cpu_pd_nodes[idx].mpidr,
psci_cpu_pd_nodes[idx].parent_node,

1
plat/st/stm32mp1/platform.mk

@ -33,6 +33,7 @@ TF_CFLAGS += -mfloat-abi=soft
endif
TF_CFLAGS += -Wsign-compare
TF_CFLAGS += -Wformat-signedness
# Not needed for Cortex-A7
WORKAROUND_CVE_2017_5715:= 0

4
plat/st/stm32mp1/stm32mp1_boot_device.c

@ -115,8 +115,8 @@ ecc:
}
}
VERBOSE("OTP: Block %i Page %i Size %lli\n", nand_dev->block_size,
nand_dev->page_size, nand_dev->size);
VERBOSE("OTP: Block %u Page %u Size %llu\n", nand_dev->block_size,
nand_dev->page_size, nand_dev->size);
return 0;
}

7
plat/st/stm32mp1/stm32mp1_shared_resources.c

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2021, STMicroelectronics - All Rights Reserved
* Copyright (c) 2017-2022, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -7,12 +7,11 @@
#include <assert.h>
#include <stdint.h>
#include <platform_def.h>
#include <common/debug.h>
#include <drivers/st/etzpc.h>
#include <drivers/st/stm32_gpio.h>
#include <platform_def.h>
#include <stm32mp_shared_resources.h>
/*
@ -164,7 +163,7 @@ static void register_periph(enum stm32mp_shres id, unsigned int state)
if ((id >= STM32MP1_SHRES_GPIOZ(0)) &&
(id <= STM32MP1_SHRES_GPIOZ(7)) &&
((unsigned int)(id - STM32MP1_SHRES_GPIOZ(0)) >= get_gpioz_nbpin())) {
ERROR("Invalid GPIO pin %u, %u pin(s) available\n",
ERROR("Invalid GPIO pin %d, %u pin(s) available\n",
id - STM32MP1_SHRES_GPIOZ(0), get_gpioz_nbpin());
panic();
}

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