diff --git a/plat/xilinx/versal/pm_service/pm_defs.h b/plat/xilinx/common/include/pm_defs.h similarity index 62% rename from plat/xilinx/versal/pm_service/pm_defs.h rename to plat/xilinx/common/include/pm_defs.h index dbc801c66..eae1f842d 100644 --- a/plat/xilinx/versal/pm_service/pm_defs.h +++ b/plat/xilinx/common/include/pm_defs.h @@ -42,23 +42,6 @@ #define PM_API_BASE_VERSION 1U #define PM_API_VERSION_2 2U -/* PM API ids */ -#define PM_REGISTER_NOTIFIER 5U -#define PM_REQ_SUSPEND 6U -#define PM_SELF_SUSPEND 7U -#define PM_FORCE_POWERDOWN 8U -#define PM_ABORT_SUSPEND 9U -#define PM_REQ_WAKEUP 10U -#define PM_SET_WAKEUP_SOURCE 11U -#define PM_SYSTEM_SHUTDOWN 12U -#define PM_IOCTL 34U -#define PM_QUERY_DATA 35U -#define PM_PLL_SET_PARAMETER 48U -#define PM_PLL_GET_PARAMETER 49U -#define PM_PLL_SET_MODE 50U -#define PM_PLL_GET_MODE 51U -#define PM_FEATURE_CHECK 63U - /* Loader API ids */ #define PM_LOAD_PDI 0x701U #define PM_LOAD_GET_HANDOFF_PARAMS 0x70BU @@ -70,10 +53,6 @@ #define IOCTL_GET_PLL_FRAC_DATA 11U #define IOCTL_SET_SGI 25U -/* Parameter ID for PLL IOCTLs */ -/* Fractional data portion for PLL */ -#define PM_PLL_PARAM_DATA 2 - /* System shutdown macros */ #define XPM_SHUTDOWN_TYPE_SHUTDOWN 0U #define XPM_SHUTDOWN_TYPE_RESET 1U @@ -87,6 +66,101 @@ * Enum definitions ********************************************************************/ +/** + * @PM_PLL_PARAM_DIV2: Enable for divide by 2 function inside the PLL + * @PM_PLL_PARAM_FBDIV: Feedback divisor integer portion for the PLL + * @PM_PLL_PARAM_DATA: Feedback divisor fractional portion for the PLL + * @PM_PLL_PARAM_PRE_SRC: Clock source for PLL input + * @PM_PLL_PARAM_POST_SRC: Clock source for PLL Bypass mode + * @PM_PLL_PARAM_LOCK_DLY: Lock circuit config settings for lock windowsize + * @PM_PLL_PARAM_LOCK_CNT: Lock circuit counter setting + * @PM_PLL_PARAM_LFHF: PLL loop filter high frequency capacitor control + * @PM_PLL_PARAM_CP: PLL charge pump control + * @PM_PLL_PARAM_RES: PLL loop filter resistor control + */ +enum pm_pll_param { + PM_PLL_PARAM_DIV2, + PM_PLL_PARAM_FBDIV, + PM_PLL_PARAM_DATA, + PM_PLL_PARAM_PRE_SRC, + PM_PLL_PARAM_POST_SRC, + PM_PLL_PARAM_LOCK_DLY, + PM_PLL_PARAM_LOCK_CNT, + PM_PLL_PARAM_LFHF, + PM_PLL_PARAM_CP, + PM_PLL_PARAM_RES, + PM_PLL_PARAM_MAX, +}; + +enum pm_api_id { + /* Miscellaneous API functions: */ + PM_GET_API_VERSION = 1, /* Do not change or move */ + PM_SET_CONFIGURATION, + PM_GET_NODE_STATUS, + PM_GET_OP_CHARACTERISTIC, + PM_REGISTER_NOTIFIER, + /* API for suspending of PUs: */ + PM_REQ_SUSPEND, + PM_SELF_SUSPEND, + PM_FORCE_POWERDOWN, + PM_ABORT_SUSPEND, + PM_REQ_WAKEUP, + PM_SET_WAKEUP_SOURCE, + PM_SYSTEM_SHUTDOWN, + /* API for managing PM slaves: */ + PM_REQ_NODE, + PM_RELEASE_NODE, + PM_SET_REQUIREMENT, + PM_SET_MAX_LATENCY, + /* Direct control API functions: */ + PM_RESET_ASSERT, + PM_RESET_GET_STATUS, + PM_MMIO_WRITE, + PM_MMIO_READ, + PM_INIT_FINALIZE, + PM_FPGA_LOAD, + PM_FPGA_GET_STATUS, + PM_GET_CHIPID, + PM_SECURE_RSA_AES, + PM_SECURE_SHA, + PM_SECURE_RSA, + PM_PINCTRL_REQUEST, + PM_PINCTRL_RELEASE, + PM_PINCTRL_GET_FUNCTION, + PM_PINCTRL_SET_FUNCTION, + PM_PINCTRL_CONFIG_PARAM_GET, + PM_PINCTRL_CONFIG_PARAM_SET, + PM_IOCTL, + /* API to query information from firmware */ + PM_QUERY_DATA, + /* Clock control API functions */ + PM_CLOCK_ENABLE, + PM_CLOCK_DISABLE, + PM_CLOCK_GETSTATE, + PM_CLOCK_SETDIVIDER, + PM_CLOCK_GETDIVIDER, + PM_CLOCK_SETRATE, + PM_CLOCK_GETRATE, + PM_CLOCK_SETPARENT, + PM_CLOCK_GETPARENT, + PM_SECURE_IMAGE, + /* FPGA PL Readback */ + PM_FPGA_READ, + PM_SECURE_AES, + /* PLL control API functions */ + PM_PLL_SET_PARAMETER, + PM_PLL_GET_PARAMETER, + PM_PLL_SET_MODE, + PM_PLL_GET_MODE, + /* PM Register Access API */ + PM_REGISTER_ACCESS, + PM_EFUSE_ACCESS, + PM_FPGA_GET_VERSION, + PM_FPGA_GET_FEATURE_LIST, + PM_FEATURE_CHECK = 63, + PM_API_MAX = 74 +}; + enum pm_abort_reason { ABORT_REASON_WKUP_EVENT = 100, ABORT_REASON_PU_BUSY, @@ -123,6 +197,7 @@ typedef enum { * @PM_RET_ERROR_NOTSUPPORTED: feature not supported (deprecated) * @PM_RET_ERROR_NOFEATURE: feature is not available * @PM_RET_ERROR_INVALID_CRC: invalid crc in IPI communication + * @PM_RET_ERROR_NOT_ENABLED: feature is not enabled * @PM_RET_ERROR_INTERNAL: internal error * @PM_RET_ERROR_CONFLICT: conflict * @PM_RET_ERROR_ACCESS: access rights violation @@ -138,6 +213,7 @@ enum pm_ret_status { PM_RET_ERROR_NOTSUPPORTED = 4, PM_RET_ERROR_NOFEATURE = 19, PM_RET_ERROR_INVALID_CRC = 301, + PM_RET_ERROR_NOT_ENABLED = 29, PM_RET_ERROR_INTERNAL = 2000, PM_RET_ERROR_CONFLICT = 2001, PM_RET_ERROR_ACCESS = 2002, @@ -145,7 +221,8 @@ enum pm_ret_status { PM_RET_ERROR_DOUBLE_REQ = 2004, PM_RET_ERROR_ABORT_SUSPEND = 2005, PM_RET_ERROR_TIMEOUT = 2006, - PM_RET_ERROR_NODE_USED = 2007 + PM_RET_ERROR_NODE_USED = 2007, + PM_RET_ERROR_NO_FEATURE = 2008 }; /** diff --git a/plat/xilinx/versal_net/include/plat_private.h b/plat/xilinx/versal_net/include/plat_private.h index 6a3bc19d0..fc4a6fdd8 100644 --- a/plat/xilinx/versal_net/include/plat_private.h +++ b/plat/xilinx/versal_net/include/plat_private.h @@ -1,7 +1,7 @@ /* * Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2021-2022, Xilinx, Inc. All rights reserved. - * Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -43,7 +43,6 @@ int32_t sip_svc_setup_init(void); */ int request_intr_type_el3(uint32_t irq, interrupt_type_handler_t fiq_handler); -#define PM_GET_CHIPID (24U) #define IOCTL_OSPI_MUX_SELECT (21U) #endif /* PLAT_PRIVATE_H */ diff --git a/plat/xilinx/versal_net/plat_psci.c b/plat/xilinx/versal_net/plat_psci.c index c5833a9ae..8bb9bdaeb 100644 --- a/plat/xilinx/versal_net/plat_psci.c +++ b/plat/xilinx/versal_net/plat_psci.c @@ -1,7 +1,7 @@ /* * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved. * Copyright (c) 2021-2022, Xilinx, Inc. All rights reserved. - * Copyright (C) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -17,11 +17,10 @@ #include #include +#include #define PM_RET_ERROR_NOFEATURE U(19) -#define PM_IOCTL 34U - static uintptr_t versal_net_sec_entry; static void zynqmp_cpu_standby(plat_local_state_t cpu_state) diff --git a/plat/xilinx/zynqmp/include/plat_pm_common.h b/plat/xilinx/zynqmp/include/plat_pm_common.h index a57aebe39..8167eb95e 100644 --- a/plat/xilinx/zynqmp/include/plat_pm_common.h +++ b/plat/xilinx/zynqmp/include/plat_pm_common.h @@ -1,5 +1,6 @@ /* * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -14,7 +15,7 @@ #include #include -#include "pm_defs.h" +#include "zynqmp_pm_defs.h" #define ZYNQMP_TZ_VERSION_MAJOR 1 diff --git a/plat/xilinx/zynqmp/pm_service/pm_defs.h b/plat/xilinx/zynqmp/pm_service/pm_defs.h deleted file mode 100644 index f00ab4b1c..000000000 --- a/plat/xilinx/zynqmp/pm_service/pm_defs.h +++ /dev/null @@ -1,359 +0,0 @@ -/* - * Copyright (c) 2013-2022, ARM Limited and Contributors. All rights reserved. - * Copyright (c) 2022-2023, Advanced Micro Devices Inc. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -/* ZynqMP power management enums and defines */ - -#ifndef PM_DEFS_H -#define PM_DEFS_H - -/********************************************************************* - * Macro definitions - ********************************************************************/ - -/* - * Version number is a 32bit value, like: - * (PM_VERSION_MAJOR << 16) | PM_VERSION_MINOR - */ -#define PM_VERSION_MAJOR 1U -#define PM_VERSION_MINOR 1U - -#define PM_VERSION ((PM_VERSION_MAJOR << 16U) | PM_VERSION_MINOR) - -/** - * PM API versions - */ -/* Expected version of firmware APIs */ -#define FW_API_BASE_VERSION (1U) -/* Expected version of firmware API for feature check */ -#define FW_API_VERSION_2 (2U) -/* Version of APIs implemented in ATF */ -#define ATF_API_BASE_VERSION (1U) -/* Updating the QUERY_DATA API versioning as the bitmask functionality - * support is added in the v2.*/ -#define TFA_API_QUERY_DATA_VERSION (2U) - -/* Capabilities for RAM */ -#define PM_CAP_ACCESS 0x1U -#define PM_CAP_CONTEXT 0x2U - -#define MAX_LATENCY (~0U) -#define MAX_QOS 100U - -/* State arguments of the self suspend */ -#define PM_STATE_CPU_IDLE 0x0U -#define PM_STATE_SUSPEND_TO_RAM 0xFU - -/* APU processor states */ -#define PM_PROC_STATE_FORCEDOFF 0U -#define PM_PROC_STATE_ACTIVE 1U -#define PM_PROC_STATE_SLEEP 2U -#define PM_PROC_STATE_SUSPENDING 3U - -#define PM_GET_CALLBACK_DATA 0xa01 -#define PM_SET_SUSPEND_MODE 0xa02 -#define PM_GET_TRUSTZONE_VERSION 0xa03 - -/********************************************************************* - * Enum definitions - ********************************************************************/ - -enum pm_api_id { - /* Miscellaneous API functions: */ - PM_GET_API_VERSION = 1, /* Do not change or move */ - PM_SET_CONFIGURATION, - PM_GET_NODE_STATUS, - PM_GET_OP_CHARACTERISTIC, - PM_REGISTER_NOTIFIER, - /* API for suspending of PUs: */ - PM_REQ_SUSPEND, - PM_SELF_SUSPEND, - PM_FORCE_POWERDOWN, - PM_ABORT_SUSPEND, - PM_REQ_WAKEUP, - PM_SET_WAKEUP_SOURCE, - PM_SYSTEM_SHUTDOWN, - /* API for managing PM slaves: */ - PM_REQ_NODE, - PM_RELEASE_NODE, - PM_SET_REQUIREMENT, - PM_SET_MAX_LATENCY, - /* Direct control API functions: */ - PM_RESET_ASSERT, - PM_RESET_GET_STATUS, - PM_MMIO_WRITE, - PM_MMIO_READ, - PM_INIT_FINALIZE, - PM_FPGA_LOAD, - PM_FPGA_GET_STATUS, - PM_GET_CHIPID, - PM_SECURE_RSA_AES, - PM_SECURE_SHA, - PM_SECURE_RSA, - PM_PINCTRL_REQUEST, - PM_PINCTRL_RELEASE, - PM_PINCTRL_GET_FUNCTION, - PM_PINCTRL_SET_FUNCTION, - PM_PINCTRL_CONFIG_PARAM_GET, - PM_PINCTRL_CONFIG_PARAM_SET, - PM_IOCTL, - /* API to query information from firmware */ - PM_QUERY_DATA, - /* Clock control API functions */ - PM_CLOCK_ENABLE, - PM_CLOCK_DISABLE, - PM_CLOCK_GETSTATE, - PM_CLOCK_SETDIVIDER, - PM_CLOCK_GETDIVIDER, - PM_CLOCK_SETRATE, - PM_CLOCK_GETRATE, - PM_CLOCK_SETPARENT, - PM_CLOCK_GETPARENT, - PM_SECURE_IMAGE, - /* FPGA PL Readback */ - PM_FPGA_READ, - PM_SECURE_AES, - /* PLL control API functions */ - PM_PLL_SET_PARAMETER, - PM_PLL_GET_PARAMETER, - PM_PLL_SET_MODE, - PM_PLL_GET_MODE, - /* PM Register Access API */ - PM_REGISTER_ACCESS, - PM_EFUSE_ACCESS, - PM_FEATURE_CHECK = 63, - PM_FPGA_GET_VERSION = 72, - PM_FPGA_GET_FEATURE_LIST, - PM_API_MAX -}; - -enum pm_node_id { - NODE_UNKNOWN = 0, - NODE_APU, - NODE_APU_0, - NODE_APU_1, - NODE_APU_2, - NODE_APU_3, - NODE_RPU, - NODE_RPU_0, - NODE_RPU_1, - NODE_PLD, - NODE_FPD, - NODE_OCM_BANK_0, - NODE_OCM_BANK_1, - NODE_OCM_BANK_2, - NODE_OCM_BANK_3, - NODE_TCM_0_A, - NODE_TCM_0_B, - NODE_TCM_1_A, - NODE_TCM_1_B, - NODE_L2, - NODE_GPU_PP_0, - NODE_GPU_PP_1, - NODE_USB_0, - NODE_USB_1, - NODE_TTC_0, - NODE_TTC_1, - NODE_TTC_2, - NODE_TTC_3, - NODE_SATA, - NODE_ETH_0, - NODE_ETH_1, - NODE_ETH_2, - NODE_ETH_3, - NODE_UART_0, - NODE_UART_1, - NODE_SPI_0, - NODE_SPI_1, - NODE_I2C_0, - NODE_I2C_1, - NODE_SD_0, - NODE_SD_1, - NODE_DP, - NODE_GDMA, - NODE_ADMA, - NODE_NAND, - NODE_QSPI, - NODE_GPIO, - NODE_CAN_0, - NODE_CAN_1, - NODE_EXTERN, - NODE_APLL, - NODE_VPLL, - NODE_DPLL, - NODE_RPLL, - NODE_IOPLL, - NODE_DDR, - NODE_IPI_APU, - NODE_IPI_RPU_0, - NODE_GPU, - NODE_PCIE, - NODE_PCAP, - NODE_RTC, - NODE_LPD, - NODE_VCU, - NODE_IPI_RPU_1, - NODE_IPI_PL_0, - NODE_IPI_PL_1, - NODE_IPI_PL_2, - NODE_IPI_PL_3, - NODE_PL, - NODE_GEM_TSU, - NODE_SWDT_0, - NODE_SWDT_1, - NODE_CSU, - NODE_PJTAG, - NODE_TRACE, - NODE_TESTSCAN, - NODE_PMU, - NODE_MAX, -}; - -enum pm_request_ack { - REQ_ACK_NO = 1, - REQ_ACK_BLOCKING, - REQ_ACK_NON_BLOCKING, -}; - -enum pm_abort_reason { - ABORT_REASON_WKUP_EVENT = 100, - ABORT_REASON_PU_BUSY, - ABORT_REASON_NO_PWRDN, - ABORT_REASON_UNKNOWN, -}; - -enum pm_suspend_reason { - SUSPEND_REASON_PU_REQ = 201, - SUSPEND_REASON_ALERT, - SUSPEND_REASON_SYS_SHUTDOWN, -}; - -enum pm_ram_state { - PM_RAM_STATE_OFF = 1, - PM_RAM_STATE_RETENTION, - PM_RAM_STATE_ON, -}; - -enum pm_opchar_type { - PM_OPCHAR_TYPE_POWER = 1, - PM_OPCHAR_TYPE_TEMP, - PM_OPCHAR_TYPE_LATENCY, -}; - -/* TODO: move pm_ret_status from device specific location to common location */ -/** - * @PM_RET_SUCCESS: success - * @PM_RET_ERROR_ARGS: illegal arguments provided (deprecated) - * @PM_RET_ERROR_NOTSUPPORTED: feature not supported (deprecated) - * @PM_RET_ERROR_NOT_ENABLED: feature is not enabled - * @PM_RET_ERROR_INVALID_CRC: invalid crc in IPI communication - * @PM_RET_ERROR_INTERNAL: internal error - * @PM_RET_ERROR_CONFLICT: conflict - * @PM_RET_ERROR_ACCESS: access rights violation - * @PM_RET_ERROR_INVALID_NODE: invalid node - * @PM_RET_ERROR_DOUBLE_REQ: duplicate request for same node - * @PM_RET_ERROR_ABORT_SUSPEND: suspend procedure has been aborted - * @PM_RET_ERROR_TIMEOUT: timeout in communication with PMU - * @PM_RET_ERROR_NODE_USED: node is already in use - */ -enum pm_ret_status { - PM_RET_SUCCESS = (0U), - PM_RET_ERROR_ARGS = (1U), - PM_RET_ERROR_NOTSUPPORTED = (4U), - PM_RET_ERROR_NOT_ENABLED = (29U), - PM_RET_ERROR_INVALID_CRC = (301U), - PM_RET_ERROR_INTERNAL = (2000U), - PM_RET_ERROR_CONFLICT = (2001U), - PM_RET_ERROR_ACCESS = (2002U), - PM_RET_ERROR_INVALID_NODE = (2003U), - PM_RET_ERROR_DOUBLE_REQ = (2004U), - PM_RET_ERROR_ABORT_SUSPEND = (2005U), - PM_RET_ERROR_TIMEOUT = (2006U), - PM_RET_ERROR_NODE_USED = (2007U), - PM_RET_ERROR_NO_FEATURE = (2008U) -}; - -/** - * @PM_INITIAL_BOOT: boot is a fresh system startup - * @PM_RESUME: boot is a resume - * @PM_BOOT_ERROR: error, boot cause cannot be identified - */ -enum pm_boot_status { - PM_INITIAL_BOOT, - PM_RESUME, - PM_BOOT_ERROR, -}; - -/** - * @PMF_SHUTDOWN_TYPE_SHUTDOWN: shutdown - * @PMF_SHUTDOWN_TYPE_RESET: reset/reboot - * @PMF_SHUTDOWN_TYPE_SETSCOPE_ONLY: set the shutdown/reboot scope - */ -enum pm_shutdown_type { - PMF_SHUTDOWN_TYPE_SHUTDOWN, - PMF_SHUTDOWN_TYPE_RESET, - PMF_SHUTDOWN_TYPE_SETSCOPE_ONLY, -}; - -/** - * @PMF_SHUTDOWN_SUBTYPE_SUBSYSTEM: shutdown/reboot APU subsystem only - * @PMF_SHUTDOWN_SUBTYPE_PS_ONLY: shutdown/reboot entire PS (but not PL) - * @PMF_SHUTDOWN_SUBTYPE_SYSTEM: shutdown/reboot entire system - */ -enum pm_shutdown_subtype { - PMF_SHUTDOWN_SUBTYPE_SUBSYSTEM, - PMF_SHUTDOWN_SUBTYPE_PS_ONLY, - PMF_SHUTDOWN_SUBTYPE_SYSTEM, -}; - -/** - * @PM_PLL_PARAM_DIV2: Enable for divide by 2 function inside the PLL - * @PM_PLL_PARAM_FBDIV: Feedback divisor integer portion for the PLL - * @PM_PLL_PARAM_DATA: Feedback divisor fractional portion for the PLL - * @PM_PLL_PARAM_PRE_SRC: Clock source for PLL input - * @PM_PLL_PARAM_POST_SRC: Clock source for PLL Bypass mode - * @PM_PLL_PARAM_LOCK_DLY: Lock circuit config settings for lock windowsize - * @PM_PLL_PARAM_LOCK_CNT: Lock circuit counter setting - * @PM_PLL_PARAM_LFHF: PLL loop filter high frequency capacitor control - * @PM_PLL_PARAM_CP: PLL charge pump control - * @PM_PLL_PARAM_RES: PLL loop filter resistor control - */ -enum pm_pll_param { - PM_PLL_PARAM_DIV2, - PM_PLL_PARAM_FBDIV, - PM_PLL_PARAM_DATA, - PM_PLL_PARAM_PRE_SRC, - PM_PLL_PARAM_POST_SRC, - PM_PLL_PARAM_LOCK_DLY, - PM_PLL_PARAM_LOCK_CNT, - PM_PLL_PARAM_LFHF, - PM_PLL_PARAM_CP, - PM_PLL_PARAM_RES, - PM_PLL_PARAM_MAX, -}; - -/** - * @PM_PLL_MODE_RESET: PLL is in reset (not locked) - * @PM_PLL_MODE_INTEGER: PLL is locked in integer mode - * @PM_PLL_MODE_FRACTIONAL: PLL is locked in fractional mode - */ -enum pm_pll_mode { - PM_PLL_MODE_RESET, - PM_PLL_MODE_INTEGER, - PM_PLL_MODE_FRACTIONAL, - PM_PLL_MODE_MAX, -}; - -/** - * @PM_CLOCK_DIV0_ID: Clock divider 0 - * @PM_CLOCK_DIV1_ID: Clock divider 1 - */ -enum pm_clock_div_id { - PM_CLOCK_DIV0_ID, - PM_CLOCK_DIV1_ID, -}; - -#endif /* PM_DEFS_H */ diff --git a/plat/xilinx/zynqmp/pm_service/zynqmp_pm_api_sys.c b/plat/xilinx/zynqmp/pm_service/zynqmp_pm_api_sys.c index d11d6ff7a..9133121ca 100644 --- a/plat/xilinx/zynqmp/pm_service/zynqmp_pm_api_sys.c +++ b/plat/xilinx/zynqmp/pm_service/zynqmp_pm_api_sys.c @@ -1496,7 +1496,7 @@ static enum pm_ret_status pm_pinctrl_get_pin_groups(uint32_t pin_id, * * This function returns requested data. */ -void pm_query_data(enum pm_query_id qid, uint32_t arg1, uint32_t arg2, +void pm_query_data(enum pm_query_ids qid, uint32_t arg1, uint32_t arg2, uint32_t arg3, uint32_t *data) { switch (qid) { diff --git a/plat/xilinx/zynqmp/pm_service/zynqmp_pm_api_sys.h b/plat/xilinx/zynqmp/pm_service/zynqmp_pm_api_sys.h index 7d2655499..71a0bd55a 100644 --- a/plat/xilinx/zynqmp/pm_service/zynqmp_pm_api_sys.h +++ b/plat/xilinx/zynqmp/pm_service/zynqmp_pm_api_sys.h @@ -11,8 +11,9 @@ #include #include "pm_defs.h" +#include "zynqmp_pm_defs.h" -enum pm_query_id { +enum pm_query_ids { PM_QID_INVALID, PM_QID_CLOCK_GET_NAME, PM_QID_CLOCK_GET_TOPOLOGY, @@ -150,7 +151,7 @@ enum pm_ret_status pm_clock_setparent(uint32_t clock_id, uint32_t parent_index); enum pm_ret_status pm_clock_getparent(uint32_t clock_id, uint32_t *parent_index); -void pm_query_data(enum pm_query_id qid, uint32_t arg1, uint32_t arg2, +void pm_query_data(enum pm_query_ids qid, uint32_t arg1, uint32_t arg2, uint32_t arg3, uint32_t *data); enum pm_ret_status pm_sha_hash(uint32_t address_high, uint32_t address_low, diff --git a/plat/xilinx/zynqmp/pm_service/zynqmp_pm_defs.h b/plat/xilinx/zynqmp/pm_service/zynqmp_pm_defs.h new file mode 100644 index 000000000..c82a3ef76 --- /dev/null +++ b/plat/xilinx/zynqmp/pm_service/zynqmp_pm_defs.h @@ -0,0 +1,209 @@ +/* + * Copyright (c) 2013-2022, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +/* ZynqMP power management enums and defines */ + +#ifndef ZYNQMP_PM_DEFS_H +#define ZYNQMP_PM_DEFS_H + +/********************************************************************* + * Macro definitions + ********************************************************************/ + +/* + * Version number is a 32bit value, like: + * (PM_VERSION_MAJOR << 16) | PM_VERSION_MINOR + */ +#define PM_VERSION_MAJOR 1U +#define PM_VERSION_MINOR 1U + +#define PM_VERSION ((PM_VERSION_MAJOR << 16U) | PM_VERSION_MINOR) + +/** + * PM API versions + */ +/* Expected version of firmware APIs */ +#define FW_API_BASE_VERSION (1U) +/* Expected version of firmware API for feature check */ +#define FW_API_VERSION_2 (2U) +/* Version of APIs implemented in ATF */ +#define ATF_API_BASE_VERSION (1U) +/* Updating the QUERY_DATA API versioning as the bitmask functionality + * support is added in the v2.*/ +#define TFA_API_QUERY_DATA_VERSION (2U) + +/* Capabilities for RAM */ +#define PM_CAP_ACCESS 0x1U +#define PM_CAP_CONTEXT 0x2U + +/* APU processor states */ +#define PM_PROC_STATE_FORCEDOFF 0U +#define PM_PROC_STATE_ACTIVE 1U +#define PM_PROC_STATE_SLEEP 2U +#define PM_PROC_STATE_SUSPENDING 3U + +#define PM_SET_SUSPEND_MODE 0xa02 + +/********************************************************************* + * Enum definitions + ********************************************************************/ + +enum pm_node_id { + NODE_UNKNOWN = 0, + NODE_APU, + NODE_APU_0, + NODE_APU_1, + NODE_APU_2, + NODE_APU_3, + NODE_RPU, + NODE_RPU_0, + NODE_RPU_1, + NODE_PLD, + NODE_FPD, + NODE_OCM_BANK_0, + NODE_OCM_BANK_1, + NODE_OCM_BANK_2, + NODE_OCM_BANK_3, + NODE_TCM_0_A, + NODE_TCM_0_B, + NODE_TCM_1_A, + NODE_TCM_1_B, + NODE_L2, + NODE_GPU_PP_0, + NODE_GPU_PP_1, + NODE_USB_0, + NODE_USB_1, + NODE_TTC_0, + NODE_TTC_1, + NODE_TTC_2, + NODE_TTC_3, + NODE_SATA, + NODE_ETH_0, + NODE_ETH_1, + NODE_ETH_2, + NODE_ETH_3, + NODE_UART_0, + NODE_UART_1, + NODE_SPI_0, + NODE_SPI_1, + NODE_I2C_0, + NODE_I2C_1, + NODE_SD_0, + NODE_SD_1, + NODE_DP, + NODE_GDMA, + NODE_ADMA, + NODE_NAND, + NODE_QSPI, + NODE_GPIO, + NODE_CAN_0, + NODE_CAN_1, + NODE_EXTERN, + NODE_APLL, + NODE_VPLL, + NODE_DPLL, + NODE_RPLL, + NODE_IOPLL, + NODE_DDR, + NODE_IPI_APU, + NODE_IPI_RPU_0, + NODE_GPU, + NODE_PCIE, + NODE_PCAP, + NODE_RTC, + NODE_LPD, + NODE_VCU, + NODE_IPI_RPU_1, + NODE_IPI_PL_0, + NODE_IPI_PL_1, + NODE_IPI_PL_2, + NODE_IPI_PL_3, + NODE_PL, + NODE_GEM_TSU, + NODE_SWDT_0, + NODE_SWDT_1, + NODE_CSU, + NODE_PJTAG, + NODE_TRACE, + NODE_TESTSCAN, + NODE_PMU, + NODE_MAX, +}; + +enum pm_request_ack { + REQ_ACK_NO = 1, + REQ_ACK_BLOCKING, + REQ_ACK_NON_BLOCKING, +}; + +enum pm_suspend_reason { + SUSPEND_REASON_PU_REQ = 201, + SUSPEND_REASON_ALERT, + SUSPEND_REASON_SYS_SHUTDOWN, +}; + +enum pm_ram_state { + PM_RAM_STATE_OFF = 1, + PM_RAM_STATE_RETENTION, + PM_RAM_STATE_ON, +}; + +/** + * @PM_INITIAL_BOOT: boot is a fresh system startup + * @PM_RESUME: boot is a resume + * @PM_BOOT_ERROR: error, boot cause cannot be identified + */ +enum pm_boot_status { + PM_INITIAL_BOOT, + PM_RESUME, + PM_BOOT_ERROR, +}; + +/** + * @PMF_SHUTDOWN_TYPE_SHUTDOWN: shutdown + * @PMF_SHUTDOWN_TYPE_RESET: reset/reboot + * @PMF_SHUTDOWN_TYPE_SETSCOPE_ONLY: set the shutdown/reboot scope + */ +enum pm_shutdown_type { + PMF_SHUTDOWN_TYPE_SHUTDOWN, + PMF_SHUTDOWN_TYPE_RESET, + PMF_SHUTDOWN_TYPE_SETSCOPE_ONLY, +}; + +/** + * @PMF_SHUTDOWN_SUBTYPE_SUBSYSTEM: shutdown/reboot APU subsystem only + * @PMF_SHUTDOWN_SUBTYPE_PS_ONLY: shutdown/reboot entire PS (but not PL) + * @PMF_SHUTDOWN_SUBTYPE_SYSTEM: shutdown/reboot entire system + */ +enum pm_shutdown_subtype { + PMF_SHUTDOWN_SUBTYPE_SUBSYSTEM, + PMF_SHUTDOWN_SUBTYPE_PS_ONLY, + PMF_SHUTDOWN_SUBTYPE_SYSTEM, +}; + +/** + * @PM_PLL_MODE_RESET: PLL is in reset (not locked) + * @PM_PLL_MODE_INTEGER: PLL is locked in integer mode + * @PM_PLL_MODE_FRACTIONAL: PLL is locked in fractional mode + */ +enum pm_pll_mode { + PM_PLL_MODE_RESET, + PM_PLL_MODE_INTEGER, + PM_PLL_MODE_FRACTIONAL, + PM_PLL_MODE_MAX, +}; + +/** + * @PM_CLOCK_DIV0_ID: Clock divider 0 + * @PM_CLOCK_DIV1_ID: Clock divider 1 + */ +enum pm_clock_div_id { + PM_CLOCK_DIV0_ID, + PM_CLOCK_DIV1_ID, +}; + +#endif /* ZYNQMP_PM_DEFS_H */ diff --git a/plat/xilinx/zynqmp/pm_service/zynqmp_pm_svc_main.c b/plat/xilinx/zynqmp/pm_service/zynqmp_pm_svc_main.c index b54936e01..1ccf258d1 100644 --- a/plat/xilinx/zynqmp/pm_service/zynqmp_pm_svc_main.c +++ b/plat/xilinx/zynqmp/pm_service/zynqmp_pm_svc_main.c @@ -23,9 +23,9 @@ #include #include "pm_client.h" -#include "pm_defs.h" #include "pm_ipi.h" #include "zynqmp_pm_api_sys.h" +#include "zynqmp_pm_defs.h" /* pm_up = !0 - UP, pm_up = 0 - DOWN */ static int32_t pm_up, ipi_irq_flag; diff --git a/plat/xilinx/zynqmp/sip_svc_setup.c b/plat/xilinx/zynqmp/sip_svc_setup.c index 6ec7ed492..3844b16ba 100644 --- a/plat/xilinx/zynqmp/sip_svc_setup.c +++ b/plat/xilinx/zynqmp/sip_svc_setup.c @@ -14,6 +14,7 @@ #include #include "ipi_mailbox_svc.h" +#include "pm_defs.h" #include "zynqmp_pm_svc_main.h" /* SMC function IDs for SiP Service queries */