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Merge "FVP: Add Delay Timer driver to BL1 and BL31" into integration

pull/1933/head
Paul Beesley 5 years ago
committed by TrustedFirmware Code Review
parent
commit
988cc82000
  1. 3
      plat/arm/board/fvp/fvp_bl1_setup.c
  2. 15
      plat/arm/board/fvp/fvp_bl2_setup.c
  3. 5
      plat/arm/board/fvp/fvp_bl2u_setup.c
  4. 5
      plat/arm/board/fvp/fvp_bl31_setup.c
  5. 22
      plat/arm/board/fvp/fvp_common.c
  6. 1
      plat/arm/board/fvp/fvp_private.h
  7. 18
      plat/arm/board/fvp/platform.mk

3
plat/arm/board/fvp/fvp_bl1_setup.c

@ -48,6 +48,9 @@ void bl1_platform_setup(void)
{
arm_bl1_platform_setup();
/* Initialize System level generic or SP804 timer */
fvp_timer_init();
/* On FVP RevC, initialize SMMUv3 */
if ((arm_config.flags & ARM_CONFIG_FVP_HAS_SMMUV3) != 0U)
smmuv3_security_init(PLAT_FVP_SMMUV3_BASE);

15
plat/arm/board/fvp/fvp_bl2_setup.c

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -25,15 +25,6 @@ void bl2_platform_setup(void)
{
arm_bl2_platform_setup();
#if FVP_USE_SP804_TIMER
/* Enable the clock override for SP804 timer 0, which means that no
* clock dividers are applied and the raw (35 MHz) clock will be used */
mmio_write_32(V2M_SP810_BASE, FVP_SP810_CTRL_TIM0_OV);
/* Initialize delay timer driver using SP804 dual timer 0 */
sp804_timer_init(V2M_SP804_TIMER0_BASE,
SP804_TIMER_CLKMULT, SP804_TIMER_CLKDIV);
#else
generic_delay_timer_init();
#endif /* FVP_USE_SP804_TIMER */
/* Initialize System level generic or SP804 timer */
fvp_timer_init();
}

5
plat/arm/board/fvp/fvp_bl2u_setup.c

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -14,6 +14,9 @@ void bl2u_early_platform_setup(struct meminfo *mem_layout, void *plat_info)
{
arm_bl2u_early_platform_setup(mem_layout, plat_info);
/* Initialize System level generic or SP804 timer */
fvp_timer_init();
/* Initialize the platform config for future decision making */
fvp_config_setup();
}

5
plat/arm/board/fvp/fvp_bl31_setup.c

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -34,6 +34,9 @@ void __init bl31_early_platform_setup2(u_register_t arg0,
*/
fvp_interconnect_enable();
/* Initialize System level generic or SP804 timer */
fvp_timer_init();
/* On FVP RevC, initialize SMMUv3 */
if ((arm_config.flags & ARM_CONFIG_FVP_HAS_SMMUV3) != 0U)
smmuv3_init(PLAT_FVP_SMMUV3_BASE);

22
plat/arm/board/fvp/fvp_common.c

@ -10,6 +10,8 @@
#include <drivers/arm/cci.h>
#include <drivers/arm/ccn.h>
#include <drivers/arm/gicv2.h>
#include <drivers/arm/sp804_delay_timer.h>
#include <drivers/generic_delay_timer.h>
#include <lib/mmio.h>
#include <lib/xlat_tables/xlat_tables_compat.h>
#include <plat/arm/common/arm_config.h>
@ -407,3 +409,23 @@ int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size)
return arm_get_mbedtls_heap(heap_addr, heap_size);
}
#endif
void fvp_timer_init(void)
{
#if FVP_USE_SP804_TIMER
/* Enable the clock override for SP804 timer 0, which means that no
* clock dividers are applied and the raw (35MHz) clock will be used.
*/
mmio_write_32(V2M_SP810_BASE, FVP_SP810_CTRL_TIM0_OV);
/* Initialize delay timer driver using SP804 dual timer 0 */
sp804_timer_init(V2M_SP804_TIMER0_BASE,
SP804_TIMER_CLKMULT, SP804_TIMER_CLKDIV);
#else
generic_delay_timer_init();
/* Enable System level generic timer */
mmio_write_32(ARM_SYS_CNTCTL_BASE + CNTCR_OFF,
CNTCR_FCREQ(0U) | CNTCR_EN);
#endif /* FVP_USE_SP804_TIMER */
}

1
plat/arm/board/fvp/fvp_private.h

@ -18,6 +18,7 @@ void fvp_config_setup(void);
void fvp_interconnect_init(void);
void fvp_interconnect_enable(void);
void fvp_interconnect_disable(void);
void fvp_timer_init(void);
void tsp_early_platform_setup(void);
#endif /* FVP_PRIVATE_H */

18
plat/arm/board/fvp/platform.mk

@ -127,6 +127,7 @@ endif
BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \
drivers/arm/sp805/sp805.c \
drivers/delay_timer/delay_timer.c \
drivers/io/io_semihosting.c \
lib/semihosting/semihosting.c \
lib/semihosting/${ARCH}/semihosting_call.S \
@ -138,6 +139,12 @@ BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \
${FVP_CPU_LIBS} \
${FVP_INTERCONNECT_SOURCES}
ifeq (${FVP_USE_SP804_TIMER},1)
BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
else
BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c
endif
BL2_SOURCES += drivers/arm/sp805/sp805.c \
drivers/io/io_semihosting.c \
@ -167,8 +174,13 @@ endif
BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \
${FVP_SECURITY_SOURCES}
ifeq (${FVP_USE_SP804_TIMER},1)
BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
endif
BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \
drivers/arm/smmu/smmu_v3.c \
drivers/delay_timer/delay_timer.c \
drivers/cfi/v2m/v2m_flash.c \
lib/utils/mem_region.c \
plat/arm/board/fvp/fvp_bl31_setup.c \
@ -181,6 +193,12 @@ BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \
${FVP_INTERCONNECT_SOURCES} \
${FVP_SECURITY_SOURCES}
ifeq (${FVP_USE_SP804_TIMER},1)
BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
else
BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c
endif
# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env)
ifdef UNIX_MK
FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts

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