Merge "fix(zynqmp): move EM SMC range to SIP range" into integration

plat/xilinx/zynqmp/pm_service/pm_defs.h

@@ -359,7 +359,7 @@ enum pm_clock_div_id {
  * EM API IDs
  */
 enum em_api_id {
-	EM_SET_ACTION = 1,
+	EM_SET_ACTION = 0x3001,
 	EM_REMOVE_ACTION,
 	EM_SEND_ERRORS,
 };

plat/xilinx/zynqmp/sip_svc_setup.c

@@ -1,5 +1,6 @@
 /*
  * Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2023, Advanced Micro Devices Inc. All rights reserved.
  *
  * SPDX-License-Identifier: BSD-3-Clause
  */
@@ -29,7 +30,7 @@
 #define XLNX_FID_MASK	GENMASK(23, 12)
 #define PM_FID_VALUE	0u
 #define IPI_FID_VALUE	0x1000u
-#define EM_FID_VALUE    0xE0000u
+#define EM_FID_VALUE	0x3000u
 #define is_em_fid(_fid) (((_fid) & XLNX_FID_MASK) == EM_FID_VALUE)
 #define is_pm_fid(_fid) (((_fid) & XLNX_FID_MASK) == PM_FID_VALUE)
 #define is_ipi_fid(_fid) (((_fid) & XLNX_FID_MASK) == IPI_FID_VALUE)
@@ -68,17 +69,17 @@ static uintptr_t sip_svc_smc_handler(uint32_t smc_fid,
 	VERBOSE("SMCID: 0x%08x, x1: 0x%016" PRIx64 ", x2: 0x%016" PRIx64 ", x3: 0x%016" PRIx64 ", x4: 0x%016" PRIx64 "\n",
 		smc_fid, x1, x2, x3, x4);
 
-	/* Let EM SMC handler deal with EM-related requests */
-	if (is_em_fid(smc_fid)) {
-		return em_smc_handler(smc_fid, x1, x2, x3, x4, cookie, handle,
-					flags);
-	}
-
 	if (smc_fid & SIP_FID_MASK) {
 		WARN("SMC out of SiP assinged range: 0x%x\n", smc_fid);
 		SMC_RET1(handle, SMC_UNK);
 	}
 
+	/* Let EM SMC handler deal with EM-related requests */
+	if (is_em_fid(smc_fid)) {
+		return em_smc_handler(smc_fid, x1, x2, x3, x4, cookie, handle,
+				      flags);
+	}
+
 	/* Let PM SMC handler deal with PM-related requests */
 	if (is_pm_fid(smc_fid)) {
 		return pm_smc_handler(smc_fid, x1, x2, x3, x4, cookie, handle,