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@ -15,28 +15,43 @@ |
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//ioctl id
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//ioctl id
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enum { |
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enum { |
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IOCTL_GET_RPU_OPER_MODE, |
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IOCTL_GET_RPU_OPER_MODE = 0, |
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IOCTL_SET_RPU_OPER_MODE, |
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IOCTL_SET_RPU_OPER_MODE = 1, |
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IOCTL_RPU_BOOT_ADDR_CONFIG, |
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IOCTL_RPU_BOOT_ADDR_CONFIG = 2, |
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IOCTL_TCM_COMB_CONFIG, |
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IOCTL_TCM_COMB_CONFIG = 3, |
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IOCTL_SET_TAPDELAY_BYPASS, |
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IOCTL_SET_TAPDELAY_BYPASS = 4, |
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IOCTL_SET_SGMII_MODE, |
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IOCTL_SET_SGMII_MODE = 5, |
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IOCTL_SD_DLL_RESET, |
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IOCTL_SD_DLL_RESET = 6, |
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IOCTL_SET_SD_TAPDELAY, |
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IOCTL_SET_SD_TAPDELAY = 7, |
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/* Ioctl for clock driver */ |
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/* Ioctl for clock driver */ |
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IOCTL_SET_PLL_FRAC_MODE, |
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IOCTL_SET_PLL_FRAC_MODE = 8, |
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IOCTL_GET_PLL_FRAC_MODE, |
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IOCTL_GET_PLL_FRAC_MODE = 9, |
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IOCTL_SET_PLL_FRAC_DATA, |
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IOCTL_SET_PLL_FRAC_DATA = 10, |
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IOCTL_GET_PLL_FRAC_DATA, |
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IOCTL_GET_PLL_FRAC_DATA = 11, |
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IOCTL_WRITE_GGS, |
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IOCTL_WRITE_GGS = 12, |
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IOCTL_READ_GGS, |
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IOCTL_READ_GGS = 13, |
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IOCTL_WRITE_PGGS, |
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IOCTL_WRITE_PGGS = 14, |
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IOCTL_READ_PGGS, |
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IOCTL_READ_PGGS = 15, |
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/* IOCTL for ULPI reset */ |
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/* IOCTL for ULPI reset */ |
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IOCTL_ULPI_RESET, |
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IOCTL_ULPI_RESET = 16, |
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/* Set healthy bit value */ |
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/* Set healthy bit value */ |
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IOCTL_SET_BOOT_HEALTH_STATUS, |
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IOCTL_SET_BOOT_HEALTH_STATUS = 17, |
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IOCTL_AFI, |
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IOCTL_AFI = 18, |
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/* Probe counter read/write */ |
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IOCTL_PROBE_COUNTER_READ = 19, |
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IOCTL_PROBE_COUNTER_WRITE = 20, |
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IOCTL_OSPI_MUX_SELECT = 21, |
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/* IOCTL for USB power request */ |
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IOCTL_USB_SET_STATE = 22, |
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/* IOCTL to get last reset reason */ |
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IOCTL_GET_LAST_RESET_REASON = 23, |
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/* AI engine NPI ISR clear */ |
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IOCTL_AIE_ISR_CLEAR = 24, |
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/* Register SGI to ATF */ |
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IOCTL_REGISTER_SGI = 25, |
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/* Runtime feature configuration */ |
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IOCTL_SET_FEATURE_CONFIG = 26, |
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IOCTL_GET_FEATURE_CONFIG = 27, |
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}; |
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}; |
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//RPU operation mode
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//RPU operation mode
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