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refactor(st): move some storage definitions to common part 

Those storage macros are common to all STM32MPU chips, move them to
plat/st/common/include/stm32mp_io_storage.h

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: Id20ec00ba65edf9ec7a3a89adfda307c954c3cb6
pull/2003/head
Yann Gautier 1 year ago
parent
136f632fbc
commit
b4939bef12
5 changed files with 55 additions and 35 deletions
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  1. 3
      plat/st/common/include/stm32mp_common.h
  2. 51
      plat/st/common/include/stm32mp_io_storage.h
  3. 6
      plat/st/stm32mp1/include/platform_def.h
  4. 4
      plat/st/stm32mp1/stm32mp1_def.h
  5. 26
      plat/st/stm32mp1/stm32mp1_fip_def.h

3
plat/st/common/include/stm32mp_common.h
View File

@ -14,6 +14,9 @@
#define JEDEC_ST_BKID U(0x0)
#define JEDEC_ST_MFID U(0x20)
/* FWU configuration (max supported value is 15) */
#define FWU_MAX_TRIAL_REBOOT U(3)
/* Functions to save and get boot context address given by ROM code */
void stm32mp_save_boot_ctx_address(uintptr_t address);
uintptr_t stm32mp_get_boot_ctx_address(void);

51
plat/st/common/include/stm32mp_io_storage.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2021-2022, STMicroelectronics - All Rights Reserved
* Copyright (c) 2021-2023, STMicroelectronics - All Rights Reserved
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -10,6 +10,55 @@
#include <drivers/io/io_storage.h>
/*******************************************************************************
* STM32MP1 RAW partition offset for devices without GPT
******************************************************************************/
#define STM32MP_EMMC_BOOT_FIP_OFFSET U(0x00040000)
#if PSA_FWU_SUPPORT
#define STM32MP_NOR_METADATA1_OFFSET U(0x00080000)
#define STM32MP_NOR_METADATA2_OFFSET U(0x000C0000)
#define STM32MP_NOR_FIP_A_OFFSET U(0x00100000)
#define STM32MP_NOR_FIP_A_GUID (const struct efi_guid)EFI_GUID(0x4fd84c93, \
0x54ef, 0x463f, 0xa7, 0xef, 0xae, 0x25, 0xff,\
0x88, 0x70, 0x87)
#define STM32MP_NOR_FIP_B_OFFSET U(0x00500000)
#define STM32MP_NOR_FIP_B_GUID (const struct efi_guid)EFI_GUID(0x09c54952, \
0xd5bf, 0x45af, 0xac, 0xee, 0x33, 0x53, 0x03,\
0x76, 0x6f, 0xb3)
#define STM32MP_NAND_METADATA1_OFFSET U(0x00100000)
#define STM32MP_NAND_METADATA2_OFFSET U(0x00180000)
#define STM32MP_NAND_FIP_A_OFFSET U(0x00200000)
#define STM32MP_NAND_FIP_A_GUID (const struct efi_guid)EFI_GUID(0x4fd84c93, \
0x54ef, 0x463f, 0xa7, 0xef, 0xae, 0x25, 0xff,\
0x88, 0x70, 0x87)
#define STM32MP_NAND_FIP_B_OFFSET U(0x00A00000)
#define STM32MP_NAND_FIP_B_GUID (const struct efi_guid)EFI_GUID(0x09c54952, \
0xd5bf, 0x45af, 0xac, 0xee, 0x33, 0x53, 0x03,\
0x76, 0x6f, 0xb3)
#define STM32MP_NAND_FIP_B_MAX_OFFSET U(0x01200000)
#else /* PSA_FWU_SUPPORT */
#ifndef STM32MP_NOR_FIP_OFFSET
#define STM32MP_NOR_FIP_OFFSET U(0x00080000)
#endif
#ifndef STM32MP_NAND_FIP_OFFSET
#define STM32MP_NAND_FIP_OFFSET U(0x00200000)
#endif
#endif /* PSA_FWU_SUPPORT */
/*
* Only used for MTD devices that need some backup blocks.
* Must define a maximum size for a partition.
*/
#define PLATFORM_MTD_MAX_PART_SIZE U(0x00400000)
#define FIP_IMAGE_NAME "fip"
#define METADATA_PART_1 "metadata1"
#define METADATA_PART_2 "metadata2"
/* IO devices handle */
extern uintptr_t storage_dev_handle;
extern uintptr_t fip_dev_handle;

6
plat/st/stm32mp1/include/platform_def.h
View File

@ -1,5 +1,5 @@
/*
* Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2015-2023, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -25,10 +25,6 @@
#define PLATFORM_STACK_SIZE 0xC00
#endif
#define FIP_IMAGE_NAME "fip"
#define METADATA_PART_1 "metadata1"
#define METADATA_PART_2 "metadata2"
#define STM32MP_PRIMARY_CPU U(0x0)
#define STM32MP_SECONDARY_CPU U(0x1)

4
plat/st/stm32mp1/stm32mp1_def.h
View File

@ -195,6 +195,7 @@ enum ddr_type {
SRAM1_SIZE - \
PLATFORM_MTD_MAX_PAGE_SIZE)
#endif
/*******************************************************************************
* STM32MP1 device/io map related constants (used for MMU)
******************************************************************************/
@ -534,9 +535,6 @@ enum ddr_type {
/* UID OTP */
#define UID_WORD_NB U(3)
/* FWU configuration (max supported value is 15) */
#define FWU_MAX_TRIAL_REBOOT U(3)
/*******************************************************************************
* STM32MP1 TAMP
******************************************************************************/

26
plat/st/stm32mp1/stm32mp1_fip_def.h
View File

@ -124,30 +124,4 @@
#define MAX_MMAP_REGIONS 10
#endif
/*******************************************************************************
* STM32MP1 RAW partition offset for devices without GPT
******************************************************************************/
#define STM32MP_EMMC_BOOT_FIP_OFFSET U(0x00040000)
#if PSA_FWU_SUPPORT
#define STM32MP_NOR_METADATA1_OFFSET U(0x00080000)
#define STM32MP_NOR_METADATA2_OFFSET U(0x000C0000)
#define STM32MP_NOR_FIP_A_OFFSET U(0x00100000)
#define STM32MP_NOR_FIP_A_GUID (const struct efi_guid)EFI_GUID(0x4fd84c93, \
0x54ef, 0x463f, 0xa7, 0xef, 0xae, 0x25, 0xff,\
0x88, 0x70, 0x87)
#define STM32MP_NOR_FIP_B_OFFSET U(0x00500000)
#define STM32MP_NOR_FIP_B_GUID (const struct efi_guid)EFI_GUID(0x09c54952, \
0xd5bf, 0x45af, 0xac, 0xee, 0x33, 0x53, 0x03,\
0x76, 0x6f, 0xb3)
#else /* PSA_FWU_SUPPORT */
#ifndef STM32MP_NOR_FIP_OFFSET
#define STM32MP_NOR_FIP_OFFSET U(0x00080000)
#endif
#ifndef STM32MP_NAND_FIP_OFFSET
#define STM32MP_NAND_FIP_OFFSET U(0x00200000)
#endif
#endif /* PSA_FWU_SUPPORT */
#endif /* STM32MP1_FIP_DEF_H */

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