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@ -1,5 +1,5 @@ |
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/*
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* Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved. |
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* Copyright (c) 2014-2019, ARM Limited and Contributors. All rights reserved. |
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* |
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* SPDX-License-Identifier: BSD-3-Clause |
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*/ |
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@ -40,13 +40,13 @@ |
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#define PLAT_MAX_PWR_LVL U(2) |
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#define PLAT_MAX_RET_STATE U(1) |
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#define PLAT_MAX_OFF_STATE U(2) |
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#define PLATFORM_SYSTEM_COUNT 1 |
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#define PLATFORM_CLUSTER_COUNT 2 |
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#define PLATFORM_CLUSTER0_CORE_COUNT 4 |
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#define PLATFORM_CLUSTER1_CORE_COUNT 2 |
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#define PLATFORM_SYSTEM_COUNT U(1) |
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#define PLATFORM_CLUSTER_COUNT U(2) |
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#define PLATFORM_CLUSTER0_CORE_COUNT U(4) |
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#define PLATFORM_CLUSTER1_CORE_COUNT U(2) |
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#define PLATFORM_CORE_COUNT (PLATFORM_CLUSTER1_CORE_COUNT + \ |
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PLATFORM_CLUSTER0_CORE_COUNT) |
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#define PLATFORM_MAX_CPUS_PER_CLUSTER 4 |
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#define PLATFORM_MAX_CPUS_PER_CLUSTER U(4) |
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#define PLATFORM_NUM_AFFS (PLATFORM_SYSTEM_COUNT + \ |
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PLATFORM_CLUSTER_COUNT + \ |
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PLATFORM_CORE_COUNT) |
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