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uniphier: use more mmap_add_dynamic_region() for loading images

Currently, uniphier_bl2_mmap hard-codes the memory region needed for
loading other images.

Towards the goal of making this really position-independent, call
mmap_add_dynamic_region() before that region gets accessed.

Change-Id: Ieb505b91ccf2483e5f1a280accda564b33f19f11
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
pull/1937/head
Masahiro Yamada 5 years ago
parent
commit
b5dd85f2c9
  1. 11
      plat/socionext/uniphier/include/platform_def.h
  2. 14
      plat/socionext/uniphier/uniphier.h
  3. 40
      plat/socionext/uniphier/uniphier_bl2_setup.c
  4. 9
      plat/socionext/uniphier/uniphier_io_storage.c

11
plat/socionext/uniphier/include/platform_def.h

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -33,11 +33,6 @@
/* 0x80080000-0x81000000: reserved for DSP */
#define UNIPHIER_SEC_DRAM_BASE 0x81000000ULL
#define UNIPHIER_SEC_DRAM_LIMIT 0x82000000ULL
#define UNIPHIER_SEC_DRAM_SIZE ((UNIPHIER_SEC_DRAM_LIMIT) - \
(UNIPHIER_SEC_DRAM_BASE))
#define BL31_BASE ULL(0x81000000)
#define BL31_LIMIT ULL(0x81080000)
@ -48,8 +43,8 @@
#define PLAT_VIRT_ADDR_SPACE_SIZE (1ULL << 32)
#define PLAT_XLAT_TABLES_DYNAMIC 1
#define MAX_XLAT_TABLES 7
#define MAX_MMAP_REGIONS 7
#define MAX_XLAT_TABLES 9
#define MAX_MMAP_REGIONS 13
#define MAX_IO_HANDLES 2
#define MAX_IO_DEVICES 2

14
plat/socionext/uniphier/uniphier.h

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -67,12 +67,7 @@ void uniphier_gic_pcpu_init(void);
unsigned int uniphier_calc_core_pos(u_register_t mpidr);
#define UNIPHIER_NS_DRAM_BASE 0x84000000
#define UNIPHIER_NS_DRAM_LIMIT 0x85000000
#define UNIPHIER_NS_DRAM_SIZE ((UNIPHIER_NS_DRAM_LIMIT) - \
(UNIPHIER_NS_DRAM_BASE))
#define UNIPHIER_BL33_BASE (UNIPHIER_NS_DRAM_BASE)
#define UNIPHIER_BL33_BASE 0x84000000
#define UNIPHIER_BL33_MAX_SIZE 0x00100000
#define UNIPHIER_SCP_BASE ((UNIPHIER_BL33_BASE) + \
@ -83,9 +78,4 @@ unsigned int uniphier_calc_core_pos(u_register_t mpidr);
(UNIPHIER_SCP_MAX_SIZE))
#define UNIPHIER_BLOCK_BUF_SIZE 0x00100000
#define UNIPHIER_IMAGE_BUF_BASE ((UNIPHIER_BLOCK_BUF_BASE) + \
(UNIPHIER_BLOCK_BUF_SIZE))
#define UNIPHIER_IMAGE_BUF_SIZE ((UNIPHIER_NS_DRAM_LIMIT) - \
(UNIPHIER_IMAGE_BUF_BASE))
#endif /* UNIPHIER_H */

40
plat/socionext/uniphier/uniphier_bl2_setup.c

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -23,6 +23,9 @@
#define BL2_SIZE ((BL2_END) - (BL2_BASE))
#define UNIPHIER_IMAGE_BUF_BASE 0x84300000UL
#define UNIPHIER_IMAGE_BUF_SIZE 0x00100000UL
static int uniphier_bl2_kick_scp;
void bl2_el3_early_platform_setup(u_register_t x0, u_register_t x1,
@ -31,23 +34,13 @@ void bl2_el3_early_platform_setup(u_register_t x0, u_register_t x1,
uniphier_console_setup();
}
static const struct mmap_region uniphier_bl2_mmap[] = {
/* for BL31, BL32 */
MAP_REGION_FLAT(UNIPHIER_SEC_DRAM_BASE, UNIPHIER_SEC_DRAM_SIZE,
MT_MEMORY | MT_RW | MT_SECURE),
/* for SCP, BL33 */
MAP_REGION_FLAT(UNIPHIER_NS_DRAM_BASE, UNIPHIER_NS_DRAM_SIZE,
MT_MEMORY | MT_RW | MT_NS),
{ .size = 0 },
};
void bl2_el3_plat_arch_setup(void)
{
unsigned int soc;
int skip_scp = 0;
int ret;
uniphier_mmap_setup(BL2_BASE, BL2_SIZE, uniphier_bl2_mmap);
uniphier_mmap_setup(BL2_BASE, BL2_SIZE, NULL);
enable_mmu_el3(0);
soc = uniphier_get_soc_id();
@ -119,6 +112,15 @@ bl_params_t *plat_get_next_bl_params(void)
void bl2_plat_preload_setup(void)
{
#ifdef UNIPHIER_DECOMPRESS_GZIP
int ret;
ret = mmap_add_dynamic_region(UNIPHIER_IMAGE_BUF_BASE,
UNIPHIER_IMAGE_BUF_BASE,
UNIPHIER_IMAGE_BUF_SIZE,
MT_MEMORY | MT_RW | MT_NS);
if (ret)
plat_error_handler(ret);
image_decompress_init(UNIPHIER_IMAGE_BUF_BASE,
UNIPHIER_IMAGE_BUF_SIZE,
gunzip);
@ -127,8 +129,20 @@ void bl2_plat_preload_setup(void)
int bl2_plat_handle_pre_image_load(unsigned int image_id)
{
struct image_info *image_info;
int ret;
image_info = uniphier_get_image_info(image_id);
ret = mmap_add_dynamic_region(image_info->image_base,
image_info->image_base,
image_info->image_max_size,
MT_MEMORY | MT_RW | MT_NS);
if (ret)
return ret;
#ifdef UNIPHIER_DECOMPRESS_GZIP
image_decompress_prepare(uniphier_get_image_info(image_id));
image_decompress_prepare(image_info);
#endif
return 0;
}

9
plat/socionext/uniphier/uniphier_io_storage.c

@ -1,5 +1,5 @@
/*
* Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -195,6 +195,13 @@ static int uniphier_io_block_setup(size_t fip_offset, uintptr_t block_dev_spec)
uniphier_fip_spec.offset = fip_offset;
ret = mmap_add_dynamic_region(UNIPHIER_BLOCK_BUF_BASE,
UNIPHIER_BLOCK_BUF_BASE,
UNIPHIER_BLOCK_BUF_SIZE,
MT_MEMORY | MT_RW | MT_NS);
if (ret)
return ret;
ret = register_io_dev_block(&uniphier_backend_dev_con);
if (ret)
return ret;

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