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Clock get parent EEMI API is reimplemented to use system-level clock and pll EEMI APIs rather than direct MMIO read/write accesses to clock and pll control registers. Since linux still uses clock set parent API to get pre_src, post_src, div2 and bypasss, in the implementation of pm_clock_get_parent() we need to workaround this by distinguishing two cases: 1) if the given clock ID corresponds to a PLL-related clock ID (*_PRE_SRC, *_POST_SRC, *_INT_MUX or *_PLL clock IDs); or 2) given clock ID is truly an on-chip clock. For case 1) we'll map the call onto PLL-specific EEMI API with the respective parameter ID. For case 2) the call is passed to the PMU. Signed-off-by: Mirela Simonovic <mirela.simonovic@aggios.com> Acked-by: Will Wong <WILLW@xilinx.com> Signed-off-by: Jolly Shah <jollys@xilinx.com>pull/1732/head
Jolly Shah
6 years ago
3 changed files with 44 additions and 42 deletions
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