From caf4eca135f4f0bac48ce297dc66bd86c80ff1bf Mon Sep 17 00:00:00 2001 From: Soby Mathew Date: Tue, 20 Feb 2018 12:50:47 +0000 Subject: [PATCH] ARM Platforms: Add CASSERT for BL2_BASE Change-Id: I93e491fde2a991fc39584c2762f33cbea40541e3 Signed-off-by: Soby Mathew --- plat/arm/common/arm_bl2_setup.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/plat/arm/common/arm_bl2_setup.c b/plat/arm/common/arm_bl2_setup.c index 5d83118a8..906ed197a 100644 --- a/plat/arm/common/arm_bl2_setup.c +++ b/plat/arm/common/arm_bl2_setup.c @@ -24,6 +24,20 @@ /* Data structure which holds the extents of the trusted SRAM for BL2 */ static meminfo_t bl2_tzram_layout __aligned(CACHE_WRITEBACK_GRANULE); +/* + * Check that BL2_BASE is atleast a page over ARM_BL_RAM_BASE. The page is for + * `meminfo_t` data structure and TB_FW_CONFIG passed from BL1. Not needed + * when BL2 is compiled for BL_AT_EL3 as BL2 doesn't need any info from BL1 and + * BL2 is loaded at base of usable SRAM. + */ +#if BL2_AT_EL3 +#define BL1_MEMINFO_OFFSET 0x0 +#else +#define BL1_MEMINFO_OFFSET PAGE_SIZE +#endif + +CASSERT(BL2_BASE >= (ARM_BL_RAM_BASE + BL1_MEMINFO_OFFSET), assert_bl2_base_overflows); + /* Weak definitions may be overridden in specific ARM standard platform */ #pragma weak bl2_early_platform_setup #pragma weak bl2_platform_setup