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TSP: Fix GCC 11.0.0 compilation error.

This patch fixes the following compilation error
reported by aarch64-none-elf-gcc 11.0.0:

bl32/tsp/tsp_main.c: In function 'tsp_smc_handler':
bl32/tsp/tsp_main.c:393:9: error: 'tsp_get_magic'
 accessing 32 bytes in a region of size 16
 [-Werror=stringop-overflow=]
  393 |         tsp_get_magic(service_args);
      |         ^~~~~~~~~~~~~~~~~~~~~~~~~~~
bl32/tsp/tsp_main.c:393:9: note: referencing argument 1
 of type 'uint64_t *' {aka 'long long unsigned int *'}
In file included from bl32/tsp/tsp_main.c:19:
bl32/tsp/tsp_private.h:64:6: note: in a call to function 'tsp_get_magic'
   64 | void tsp_get_magic(uint64_t args[4]);
      |      ^~~~~~~~~~~~~

by changing declaration of tsp_get_magic function from
void tsp_get_magic(uint64_t args[4]);
to
uint128_t tsp_get_magic(void);
which returns arguments directly in x0 and x1 registers.

In bl32\tsp\tsp_main.c the current tsp_smc_handler()
implementation calls tsp_get_magic(service_args);
, where service_args array is declared as
uint64_t service_args[2];
and tsp_get_magic() in bl32\tsp\aarch64\tsp_request.S
copies only 2 registers in output buffer:
	/* Store returned arguments to the array */
	stp	x0, x1, [x4, #0]

Change-Id: Ib34759fc5d7bb803e6c734540d91ea278270b330
Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
pull/1939/head
Alexei Fedorov 4 years ago
parent
commit
caff3c8724
  1. 13
      bl32/tsp/aarch64/tsp_request.S
  2. 30
      bl32/tsp/tsp_main.c
  3. 4
      bl32/tsp/tsp_private.h

13
bl32/tsp/aarch64/tsp_request.S

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -9,28 +9,19 @@
.globl tsp_get_magic
/*
* This function raises an SMC to retrieve arguments from secure
* monitor/dispatcher, saves the returned arguments the array received in x0,
* and then returns to the caller
*/
func tsp_get_magic
/* Save address to stack */
stp x0, xzr, [sp, #-16]!
/* Load arguments */
ldr w0, _tsp_fid_get_magic
/* Raise SMC */
smc #0
/* Restore address from stack */
ldp x4, xzr, [sp], #16
/* Store returned arguments to the array */
stp x0, x1, [x4, #0]
/* Return arguments in x1:x0 */
ret
endfunc tsp_get_magic

30
bl32/tsp/tsp_main.c

@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2013-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -363,8 +363,10 @@ tsp_args_t *tsp_smc_handler(uint64_t func,
uint64_t arg6,
uint64_t arg7)
{
uint128_t service_args;
uint64_t service_arg0;
uint64_t service_arg1;
uint64_t results[2];
uint64_t service_args[2];
uint32_t linear_id = plat_my_core_pos();
/* Update this cpu's statistics */
@ -387,10 +389,12 @@ tsp_args_t *tsp_smc_handler(uint64_t func,
results[1] = arg2;
/*
* Request a service back from dispatcher/secure monitor. This call
* return and thereafter resume execution
* Request a service back from dispatcher/secure monitor.
* This call returns and thereafter resumes execution.
*/
tsp_get_magic(service_args);
service_args = tsp_get_magic();
service_arg0 = (uint64_t)service_args;
service_arg1 = (uint64_t)(service_args >> 64U);
#if CTX_INCLUDE_MTE_REGS
/*
@ -403,20 +407,20 @@ tsp_args_t *tsp_smc_handler(uint64_t func,
/* Determine the function to perform based on the function ID */
switch (TSP_BARE_FID(func)) {
case TSP_ADD:
results[0] += service_args[0];
results[1] += service_args[1];
results[0] += service_arg0;
results[1] += service_arg1;
break;
case TSP_SUB:
results[0] -= service_args[0];
results[1] -= service_args[1];
results[0] -= service_arg0;
results[1] -= service_arg1;
break;
case TSP_MUL:
results[0] *= service_args[0];
results[1] *= service_args[1];
results[0] *= service_arg0;
results[1] *= service_arg1;
break;
case TSP_DIV:
results[0] /= service_args[0] ? service_args[0] : 1;
results[1] /= service_args[1] ? service_args[1] : 1;
results[0] /= service_arg0 ? service_arg0 : 1;
results[1] /= service_arg1 ? service_arg1 : 1;
break;
default:
break;

4
bl32/tsp/tsp_private.h

@ -1,5 +1,5 @@
/*
* Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
* Copyright (c) 2014-2020, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -61,7 +61,7 @@ typedef struct tsp_args {
*/
CASSERT(TSP_ARGS_SIZE == sizeof(tsp_args_t), assert_sp_args_size_mismatch);
void tsp_get_magic(uint64_t args[4]);
uint128_t tsp_get_magic(void);
tsp_args_t *tsp_cpu_resume_main(uint64_t max_off_pwrlvl,
uint64_t arg1,

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