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feat(intel): add intel_rsu_update() to sip_svc_v2

Add smc function id for intel_rsu_update() in sip_svc_v2. For temporarily
saving the RSU application image address before a cold reset is
issued.

Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I43bc7bd5aa5fa9238bceba1d826bf0a34ff87adb
pull/1999/head
Mahesh Rao 1 year ago
committed by Jit Loon Lim
parent
commit
e3c3a48c85
  1. 6
      plat/intel/soc/common/include/socfpga_sip_svc.h
  2. 2
      plat/intel/soc/common/socfpga_sip_svc.c
  3. 4
      plat/intel/soc/common/socfpga_sip_svc_v2.c

6
plat/intel/soc/common/include/socfpga_sip_svc.h

@ -167,6 +167,7 @@
#define INTEL_SIP_SMC_V2_REG_WRITE 0xC2000402
#define INTEL_SIP_SMC_V2_REG_UPDATE 0xC2000403
#define INTEL_SIP_SMC_V2_HPS_SET_BRIDGES 0xC2000404
#define INTEL_SIP_SMC_V2_RSU_UPDATE_ADDR 0xC2000405
/* V2: Mailbox function identifier */
#define INTEL_SIP_SMC_V2_MAILBOX_SEND_COMMAND 0xC2000420
@ -185,7 +186,7 @@
/*
* Increase if there is new SMC function ID being added
*/
#define SIP_SVC_VERSION_MINOR 1
#define SIP_SVC_VERSION_MINOR 2
/* Structure Definitions */
@ -219,6 +220,9 @@ uint32_t intel_secure_reg_write(uint64_t reg_addr, uint32_t val,
uint32_t intel_secure_reg_update(uint64_t reg_addr, uint32_t mask,
uint32_t val, uint32_t *retval);
/* Set RSU update address*/
uint32_t intel_rsu_update(uint64_t update_address);
/* Miscellaneous HPS services */
uint32_t intel_hps_set_bridges(uint64_t enable, uint64_t mask);

2
plat/intel/soc/common/socfpga_sip_svc.c

@ -442,7 +442,7 @@ static uint32_t intel_rsu_status(uint64_t *respbuf, unsigned int respbuf_sz)
return INTEL_SIP_SMC_STATUS_OK;
}
static uint32_t intel_rsu_update(uint64_t update_address)
uint32_t intel_rsu_update(uint64_t update_address)
{
if (update_address > SIZE_MAX) {
return INTEL_SIP_SMC_STATUS_REJECTED;

4
plat/intel/soc/common/socfpga_sip_svc_v2.c

@ -158,6 +158,10 @@ uintptr_t sip_smc_handler_v2(uint32_t smc_fid,
status = intel_hps_set_bridges(x2, x3);
SMC_RET2(handle, status, x1);
case INTEL_SIP_SMC_V2_RSU_UPDATE_ADDR:
status = intel_rsu_update(x2);
SMC_RET2(handle, status, x1);
case INTEL_SIP_SMC_V2_MAILBOX_SEND_COMMAND:
status = intel_v2_mbox_send_cmd(x1, (uint32_t *)x2, x3);
SMC_RET2(handle, status, x1);

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