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fix(imx8m): check the validation of domain id

check the domain id to make sure it is in the valid range
to make sure no out of range access to the array.

Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: Iccd7298eea390b6e68156bb356226839a23417ea
pull/1985/head
Jacky Bai 3 years ago
parent
commit
eb7fb938c3
  1. 10
      plat/imx/imx8m/imx8mp/gpc.c

10
plat/imx/imx8m/imx8mp/gpc.c

@ -1,5 +1,5 @@
/*
* Copyright 2019-2020 NXP
* Copyright 2019-2022 NXP
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@ -69,10 +69,11 @@ enum pu_domain_id {
HDMIMIX,
HDMI_PHY,
DDRMIX,
MAX_DOMAINS,
};
/* PU domain, add some hole to minimize the uboot change */
static struct imx_pwr_domain pu_domains[20] = {
static struct imx_pwr_domain pu_domains[MAX_DOMAINS] = {
[MIPI_PHY1] = IMX_PD_DOMAIN(MIPI_PHY1, false),
[PCIE_PHY] = IMX_PD_DOMAIN(PCIE_PHY, false),
[USB1_PHY] = IMX_PD_DOMAIN(USB1_PHY, true),
@ -174,6 +175,11 @@ static void imx_gpc_pm_domain_enable(uint32_t domain_id, bool on)
struct imx_pwr_domain *pwr_domain = &pu_domains[domain_id];
unsigned int i;
/* validate the domain id */
if (domain_id >= MAX_DOMAINS) {
return;
}
if (domain_id == HSIOMIX) {
for (i = 0; i < ARRAY_SIZE(hsiomix_clk); i++) {
hsiomix_clk[i].val = mmio_read_32(IMX_CCM_BASE + hsiomix_clk[i].offset);

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