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@ -23,320 +23,229 @@ |
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#include "spm_private.h" |
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/* Lock used for SP_MEMORY_ATTRIBUTES_GET and SP_MEMORY_ATTRIBUTES_SET */ |
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static spinlock_t mem_attr_smc_lock; |
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/*******************************************************************************
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* Secure Partition context information. |
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******************************************************************************/ |
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static secure_partition_context_t sp_ctx; |
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static sp_context_t sp_ctx; |
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/*******************************************************************************
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* Replace the S-EL1 re-entry information with S-EL0 re-entry |
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* information |
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* Set state of a Secure Partition context. |
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******************************************************************************/ |
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static void spm_setup_next_eret_into_sel0(const cpu_context_t *secure_context) |
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void sp_state_set(sp_context_t *sp_ptr, sp_state_t state) |
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{ |
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assert(secure_context == cm_get_context(SECURE)); |
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cm_set_elr_spsr_el3(SECURE, read_elr_el1(), read_spsr_el1()); |
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spin_lock(&(sp_ptr->state_lock)); |
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sp_ptr->state = state; |
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spin_unlock(&(sp_ptr->state_lock)); |
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} |
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/*******************************************************************************
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* This function takes an SP context pointer and: |
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* 1. Applies the S-EL1 system register context from sp_ctx->cpu_ctx. |
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* 2. Saves the current C runtime state (callee-saved registers) on the stack |
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* frame and saves a reference to this state. |
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* 3. Calls el3_exit() so that the EL3 system and general purpose registers |
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* from the sp_ctx->cpu_ctx are used to enter the secure partition image. |
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* Wait until the state of a Secure Partition is the specified one and change it |
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* to the desired state. |
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******************************************************************************/ |
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static uint64_t spm_synchronous_sp_entry(secure_partition_context_t *sp_ctx_ptr) |
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void sp_state_wait_switch(sp_context_t *sp_ptr, sp_state_t from, sp_state_t to) |
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{ |
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uint64_t rc; |
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int success = 0; |
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assert(sp_ctx_ptr != NULL); |
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assert(sp_ctx_ptr->c_rt_ctx == 0); |
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assert(cm_get_context(SECURE) == &sp_ctx_ptr->cpu_ctx); |
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while (success == 0) { |
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spin_lock(&(sp_ptr->state_lock)); |
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/* Apply the Secure EL1 system register context and switch to it */ |
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cm_el1_sysregs_context_restore(SECURE); |
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cm_set_next_eret_context(SECURE); |
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if (sp_ptr->state == from) { |
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sp_ptr->state = to; |
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VERBOSE("%s: We're about to enter the Secure partition...\n", __func__); |
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rc = spm_secure_partition_enter(&sp_ctx_ptr->c_rt_ctx); |
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#if ENABLE_ASSERTIONS |
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sp_ctx_ptr->c_rt_ctx = 0; |
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#endif |
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success = 1; |
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} |
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return rc; |
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spin_unlock(&(sp_ptr->state_lock)); |
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} |
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} |
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/*******************************************************************************
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* This function takes a Secure partition context pointer and: |
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* 1. Saves the S-EL1 system register context to sp_ctx->cpu_ctx. |
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* 2. Restores the current C runtime state (callee saved registers) from the |
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* stack frame using the reference to this state saved in |
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* spm_secure_partition_enter(). |
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* 3. It does not need to save any general purpose or EL3 system register state |
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* as the generic smc entry routine should have saved those. |
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* Check if the state of a Secure Partition is the specified one and, if so, |
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* change it to the desired state. Returns 0 on success, -1 on error. |
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******************************************************************************/ |
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static void __dead2 spm_synchronous_sp_exit( |
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const secure_partition_context_t *sp_ctx_ptr, uint64_t ret) |
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int sp_state_try_switch(sp_context_t *sp_ptr, sp_state_t from, sp_state_t to) |
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{ |
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assert(sp_ctx_ptr != NULL); |
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/* Save the Secure EL1 system register context */ |
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assert(cm_get_context(SECURE) == &sp_ctx_ptr->cpu_ctx); |
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cm_el1_sysregs_context_save(SECURE); |
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int ret = -1; |
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assert(sp_ctx_ptr->c_rt_ctx != 0U); |
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spm_secure_partition_exit(sp_ctx_ptr->c_rt_ctx, ret); |
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spin_lock(&(sp_ptr->state_lock)); |
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if (sp_ptr->state == from) { |
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sp_ptr->state = to; |
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ret = 0; |
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} |
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/* Should never reach here */ |
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assert(0); |
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spin_unlock(&(sp_ptr->state_lock)); |
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return ret; |
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} |
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/*******************************************************************************
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* This function passes control to the Secure Partition image (BL32) for the |
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* first time on the primary cpu after a cold boot. It assumes that a valid |
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* secure context has already been created by spm_setup() which can be directly |
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* used. This function performs a synchronous entry into the Secure partition. |
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* The SP passes control back to this routine through a SMC. |
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* This function takes an SP context pointer and prepares the CPU to enter. |
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******************************************************************************/ |
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static int32_t spm_init(void) |
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static void spm_sp_prepare_enter(sp_context_t *sp_ctx) |
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{ |
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entry_point_info_t *secure_partition_ep_info; |
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uint64_t rc; |
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VERBOSE("%s entry\n", __func__); |
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/*
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* Get information about the Secure Partition (BL32) image. Its |
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* absence is a critical failure. |
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*/ |
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secure_partition_ep_info = bl31_plat_get_next_image_ep_info(SECURE); |
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assert(secure_partition_ep_info != NULL); |
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assert(sp_ctx != NULL); |
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/*
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* Initialise the common context and then overlay the S-EL0 specific |
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* context on top of it. |
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*/ |
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cm_init_my_context(secure_partition_ep_info); |
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secure_partition_setup(); |
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/* Assign the context of the SP to this CPU */ |
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cm_set_context(&(sp_ctx->cpu_ctx), SECURE); |
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/*
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* Make all CPUs use the same secure context. |
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*/ |
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for (unsigned int i = 0; i < PLATFORM_CORE_COUNT; i++) { |
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cm_set_context_by_index(i, &sp_ctx.cpu_ctx, SECURE); |
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} |
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/* Restore the context assigned above */ |
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cm_el1_sysregs_context_restore(SECURE); |
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cm_set_next_eret_context(SECURE); |
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/*
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* Arrange for an entry into the secure partition. |
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*/ |
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sp_ctx.sp_init_in_progress = 1; |
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rc = spm_synchronous_sp_entry(&sp_ctx); |
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assert(rc == 0); |
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sp_ctx.sp_init_in_progress = 0; |
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VERBOSE("SP_MEMORY_ATTRIBUTES_SET_AARCH64 availability has been revoked\n"); |
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/* Invalidate TLBs at EL1. */ |
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tlbivmalle1(); |
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dsbish(); |
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} |
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return rc; |
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/*******************************************************************************
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* Enter SP after preparing it with spm_sp_prepare_enter(). |
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******************************************************************************/ |
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static uint64_t spm_sp_enter(sp_context_t *sp_ctx) |
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{ |
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/* Enter Secure Partition */ |
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return spm_secure_partition_enter(&sp_ctx->c_rt_ctx); |
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} |
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/*******************************************************************************
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* Given a secure partition entrypoint info pointer, entry point PC & pointer to |
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* a context data structure, this function will initialize the SPM context and |
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* entry point info for the secure partition. |
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* Jump to each Secure Partition for the first time. |
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******************************************************************************/ |
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void spm_init_sp_ep_state(struct entry_point_info *sp_ep_info, |
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uint64_t pc, |
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secure_partition_context_t *sp_ctx_ptr) |
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static int32_t spm_init(void) |
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{ |
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uint32_t ep_attr; |
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uint64_t rc = 0; |
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sp_context_t *ctx; |
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INFO("Secure Partition init...\n"); |
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ctx = &sp_ctx; |
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assert(sp_ep_info != NULL); |
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assert(pc != 0U); |
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assert(sp_ctx_ptr != NULL); |
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ctx->state = SP_STATE_RESET; |
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cm_set_context(&sp_ctx_ptr->cpu_ctx, SECURE); |
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spm_sp_prepare_enter(ctx); |
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rc |= spm_sp_enter(ctx); |
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assert(rc == 0); |
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/* initialise an entrypoint to set up the CPU context */ |
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ep_attr = SECURE | EP_ST_ENABLE; |
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if ((read_sctlr_el3() & SCTLR_EE_BIT) != 0U) |
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ep_attr |= EP_EE_BIG; |
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SET_PARAM_HEAD(sp_ep_info, PARAM_EP, VERSION_1, ep_attr); |
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ctx->state = SP_STATE_IDLE; |
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sp_ep_info->pc = pc; |
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/* The secure partition runs in S-EL0. */ |
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sp_ep_info->spsr = SPSR_64(MODE_EL0, |
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MODE_SP_EL0, |
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DISABLE_ALL_EXCEPTIONS); |
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INFO("Secure Partition initialized.\n"); |
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zeromem(&sp_ep_info->args, sizeof(sp_ep_info->args)); |
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return rc; |
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} |
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/*******************************************************************************
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* Secure Partition Manager setup. The SPM finds out the SP entrypoint if not |
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* already known and initialises the context for entry into the SP for its |
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* initialisation. |
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* Initialize contexts of all Secure Partitions. |
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******************************************************************************/ |
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int32_t spm_setup(void) |
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{ |
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entry_point_info_t *secure_partition_ep_info; |
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sp_context_t *ctx; |
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VERBOSE("%s entry\n", __func__); |
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/* Disable MMU at EL1 (initialized by BL2) */ |
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disable_mmu_icache_el1(); |
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/*
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* Get information about the Secure Partition (BL32) image. Its |
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* absence is a critical failure. |
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*/ |
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secure_partition_ep_info = bl31_plat_get_next_image_ep_info(SECURE); |
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if (secure_partition_ep_info == NULL) { |
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WARN("No SPM provided by BL2 boot loader, Booting device" |
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" without SPM initialization. SMCs destined for SPM" |
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" will return SMC_UNK\n"); |
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return 1; |
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} |
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/* Initialize context of the SP */ |
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INFO("Secure Partition context setup start...\n"); |
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/*
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* If there's no valid entry point for SP, we return a non-zero value |
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* signalling failure initializing the service. We bail out without |
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* registering any handlers |
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*/ |
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if (secure_partition_ep_info->pc == 0U) { |
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return 1; |
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} |
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ctx = &sp_ctx; |
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spm_init_sp_ep_state(secure_partition_ep_info, |
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secure_partition_ep_info->pc, |
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&sp_ctx); |
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/* Assign translation tables context. */ |
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ctx->xlat_ctx_handle = spm_get_sp_xlat_context(); |
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/*
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* All SPM initialization done. Now register our init function with |
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* BL31 for deferred invocation |
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*/ |
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spm_sp_setup(ctx); |
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/* Register init function for deferred init. */ |
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bl31_register_bl32_init(&spm_init); |
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VERBOSE("%s exit\n", __func__); |
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INFO("Secure Partition setup done.\n"); |
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return 0; |
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} |
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/*
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* Attributes are encoded using a different format in the SMC interface than in |
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* the Trusted Firmware, where the mmap_attr_t enum type is used. This function |
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* converts an attributes value from the SMC format to the mmap_attr_t format by |
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* setting MT_RW/MT_RO, MT_USER/MT_PRIVILEGED and MT_EXECUTE/MT_EXECUTE_NEVER. |
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* The other fields are left as 0 because they are ignored by the function |
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* change_mem_attributes(). |
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*/ |
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static unsigned int smc_attr_to_mmap_attr(unsigned int attributes) |
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/*******************************************************************************
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* MM_COMMUNICATE handler |
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******************************************************************************/ |
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static uint64_t mm_communicate(uint32_t smc_fid, uint64_t mm_cookie, |
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uint64_t comm_buffer_address, |
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uint64_t comm_size_address, void *handle) |
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{ |
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unsigned int tf_attr = 0U; |
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sp_context_t *ctx = &sp_ctx; |
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unsigned int access = (attributes & SP_MEMORY_ATTRIBUTES_ACCESS_MASK) |
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>> SP_MEMORY_ATTRIBUTES_ACCESS_SHIFT; |
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if (access == SP_MEMORY_ATTRIBUTES_ACCESS_RW) { |
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tf_attr |= MT_RW | MT_USER; |
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} else if (access == SP_MEMORY_ATTRIBUTES_ACCESS_RO) { |
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tf_attr |= MT_RO | MT_USER; |
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} else { |
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/* Other values are reserved. */ |
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assert(access == SP_MEMORY_ATTRIBUTES_ACCESS_NOACCESS); |
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/* The only requirement is that there's no access from EL0 */ |
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tf_attr |= MT_RO | MT_PRIVILEGED; |
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/* Cookie. Reserved for future use. It must be zero. */ |
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if (mm_cookie != 0U) { |
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ERROR("MM_COMMUNICATE: cookie is not zero\n"); |
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SMC_RET1(handle, SPM_INVALID_PARAMETER); |
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} |
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if ((attributes & SP_MEMORY_ATTRIBUTES_NON_EXEC) == 0) { |
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tf_attr |= MT_EXECUTE; |
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} else { |
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tf_attr |= MT_EXECUTE_NEVER; |
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if (comm_buffer_address == 0U) { |
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ERROR("MM_COMMUNICATE: comm_buffer_address is zero\n"); |
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SMC_RET1(handle, SPM_INVALID_PARAMETER); |
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} |
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return tf_attr; |
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} |
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/*
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* This function converts attributes from the Trusted Firmware format into the |
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* SMC interface format. |
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*/ |
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static unsigned int smc_mmap_to_smc_attr(unsigned int attr) |
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{ |
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unsigned int smc_attr = 0U; |
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unsigned int data_access; |
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if ((attr & MT_USER) == 0) { |
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/* No access from EL0. */ |
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data_access = SP_MEMORY_ATTRIBUTES_ACCESS_NOACCESS; |
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} else { |
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if ((attr & MT_RW) != 0) { |
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assert(MT_TYPE(attr) != MT_DEVICE); |
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data_access = SP_MEMORY_ATTRIBUTES_ACCESS_RW; |
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} else { |
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data_access = SP_MEMORY_ATTRIBUTES_ACCESS_RO; |
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} |
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if (comm_size_address != 0U) { |
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VERBOSE("MM_COMMUNICATE: comm_size_address is not 0 as recommended.\n"); |
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} |
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smc_attr |= (data_access & SP_MEMORY_ATTRIBUTES_ACCESS_MASK) |
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<< SP_MEMORY_ATTRIBUTES_ACCESS_SHIFT; |
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/* Save the Normal world context */ |
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cm_el1_sysregs_context_save(NON_SECURE); |
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if ((attr & MT_EXECUTE_NEVER) != 0U) { |
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smc_attr |= SP_MEMORY_ATTRIBUTES_NON_EXEC; |
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} |
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/* Wait until the Secure Partition is IDLE and set it to BUSY. */ |
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sp_state_wait_switch(ctx, SP_STATE_IDLE, SP_STATE_BUSY); |
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/* Jump to the Secure Partition. */ |
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spm_sp_prepare_enter(ctx); |
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return smc_attr; |
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SMC_RET4(&(ctx->cpu_ctx), smc_fid, comm_buffer_address, |
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comm_size_address, plat_my_core_pos()); |
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} |
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static int32_t spm_memory_attributes_get_smc_handler(uintptr_t base_va) |
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/*******************************************************************************
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* SP_EVENT_COMPLETE_AARCH64 handler |
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******************************************************************************/ |
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static uint64_t sp_event_complete(uint64_t x1) |
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{ |
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uint32_t attributes; |
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spin_lock(&mem_attr_smc_lock); |
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int rc = get_mem_attributes(secure_partition_xlat_ctx_handle, |
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base_va, &attributes); |
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sp_context_t *ctx = &sp_ctx; |
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spin_unlock(&mem_attr_smc_lock); |
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/* Save secure state */ |
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cm_el1_sysregs_context_save(SECURE); |
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/* Convert error codes of get_mem_attributes() into SPM ones. */ |
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assert((rc == 0) || (rc == -EINVAL)); |
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if (ctx->state == SP_STATE_RESET) { |
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/*
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* SPM reports completion. The SPM must have initiated the |
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* original request through a synchronous entry into the secure |
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* partition. Jump back to the original C runtime context. |
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*/ |
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spm_secure_partition_exit(ctx->c_rt_ctx, x1); |
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if (rc == 0) { |
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return (int32_t) smc_mmap_to_smc_attr(attributes); |
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} else { |
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return SPM_INVALID_PARAMETER; |
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/* spm_secure_partition_exit doesn't return */ |
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} |
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} |
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static int spm_memory_attributes_set_smc_handler(u_register_t page_address, |
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u_register_t pages_count, |
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u_register_t smc_attributes) |
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{ |
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uintptr_t base_va = (uintptr_t) page_address; |
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size_t size = (size_t) (pages_count * PAGE_SIZE); |
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uint32_t attributes = (uint32_t) smc_attributes; |
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/*
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* This is the result from the Secure partition of an earlier request. |
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* Copy the result into the non-secure context and return to the |
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* non-secure state. |
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*/ |
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INFO(" Start address : 0x%lx\n", base_va); |
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INFO(" Number of pages: %i (%zi bytes)\n", (int) pages_count, size); |
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INFO(" Attributes : 0x%x\n", attributes); |
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/* Mark Secure Partition as idle */ |
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assert(ctx->state == SP_STATE_BUSY); |
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spin_lock(&mem_attr_smc_lock); |
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sp_state_set(ctx, SP_STATE_IDLE); |
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int ret = change_mem_attributes(secure_partition_xlat_ctx_handle, |
|
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base_va, size, smc_attr_to_mmap_attr(attributes)); |
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/* Get a reference to the non-secure context */ |
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cpu_context_t *ns_cpu_context = cm_get_context(NON_SECURE); |
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spin_unlock(&mem_attr_smc_lock); |
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assert(ns_cpu_context != NULL); |
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|
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|
/* Convert error codes of change_mem_attributes() into SPM ones. */ |
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|
assert((ret == 0) || (ret == -EINVAL)); |
|
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|
/* Restore non-secure state */ |
|
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|
cm_el1_sysregs_context_restore(NON_SECURE); |
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|
cm_set_next_eret_context(NON_SECURE); |
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|
return (ret == 0) ? SPM_SUCCESS : SPM_INVALID_PARAMETER; |
|
|
|
/* Return to non-secure world */ |
|
|
|
SMC_RET1(ns_cpu_context, x1); |
|
|
|
} |
|
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|
|
|
|
|
|
|
|
/*******************************************************************************
|
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|
|
* Secure Partition Manager SMC handler. |
|
|
|
******************************************************************************/ |
|
|
|
uint64_t spm_smc_handler(uint32_t smc_fid, |
|
|
|
uint64_t x1, |
|
|
|
uint64_t x2, |
|
|
|
@ -346,7 +255,6 @@ uint64_t spm_smc_handler(uint32_t smc_fid, |
|
|
|
void *handle, |
|
|
|
uint64_t flags) |
|
|
|
{ |
|
|
|
cpu_context_t *ns_cpu_context; |
|
|
|
unsigned int ns; |
|
|
|
|
|
|
|
/* Determine which security state this SMC originated from */ |
|
|
|
@ -356,66 +264,40 @@ uint64_t spm_smc_handler(uint32_t smc_fid, |
|
|
|
|
|
|
|
/* Handle SMCs from Secure world. */ |
|
|
|
|
|
|
|
assert(handle == cm_get_context(SECURE)); |
|
|
|
|
|
|
|
/* Make next ERET jump to S-EL0 instead of S-EL1. */ |
|
|
|
cm_set_elr_spsr_el3(SECURE, read_elr_el1(), read_spsr_el1()); |
|
|
|
|
|
|
|
switch (smc_fid) { |
|
|
|
|
|
|
|
case SPM_VERSION_AARCH32: |
|
|
|
SMC_RET1(handle, SPM_VERSION_COMPILED); |
|
|
|
|
|
|
|
case SP_EVENT_COMPLETE_AARCH64: |
|
|
|
assert(handle == cm_get_context(SECURE)); |
|
|
|
cm_el1_sysregs_context_save(SECURE); |
|
|
|
spm_setup_next_eret_into_sel0(handle); |
|
|
|
|
|
|
|
if (sp_ctx.sp_init_in_progress) { |
|
|
|
/*
|
|
|
|
* SPM reports completion. The SPM must have |
|
|
|
* initiated the original request through a |
|
|
|
* synchronous entry into the secure |
|
|
|
* partition. Jump back to the original C |
|
|
|
* runtime context. |
|
|
|
*/ |
|
|
|
spm_synchronous_sp_exit(&sp_ctx, x1); |
|
|
|
assert(0); |
|
|
|
} |
|
|
|
|
|
|
|
/* Release the Secure Partition context */ |
|
|
|
spin_unlock(&sp_ctx.lock); |
|
|
|
|
|
|
|
/*
|
|
|
|
* This is the result from the Secure partition of an |
|
|
|
* earlier request. Copy the result into the non-secure |
|
|
|
* context, save the secure state and return to the |
|
|
|
* non-secure state. |
|
|
|
*/ |
|
|
|
|
|
|
|
/* Get a reference to the non-secure context */ |
|
|
|
ns_cpu_context = cm_get_context(NON_SECURE); |
|
|
|
assert(ns_cpu_context != NULL); |
|
|
|
|
|
|
|
/* Restore non-secure state */ |
|
|
|
cm_el1_sysregs_context_restore(NON_SECURE); |
|
|
|
cm_set_next_eret_context(NON_SECURE); |
|
|
|
|
|
|
|
/* Return to normal world */ |
|
|
|
SMC_RET1(ns_cpu_context, x1); |
|
|
|
return sp_event_complete(x1); |
|
|
|
|
|
|
|
case SP_MEMORY_ATTRIBUTES_GET_AARCH64: |
|
|
|
INFO("Received SP_MEMORY_ATTRIBUTES_GET_AARCH64 SMC\n"); |
|
|
|
|
|
|
|
if (!sp_ctx.sp_init_in_progress) { |
|
|
|
if (sp_ctx.state != SP_STATE_RESET) { |
|
|
|
WARN("SP_MEMORY_ATTRIBUTES_GET_AARCH64 is available at boot time only\n"); |
|
|
|
SMC_RET1(handle, SPM_NOT_SUPPORTED); |
|
|
|
} |
|
|
|
SMC_RET1(handle, spm_memory_attributes_get_smc_handler(x1)); |
|
|
|
SMC_RET1(handle, |
|
|
|
spm_memory_attributes_get_smc_handler( |
|
|
|
&sp_ctx, x1)); |
|
|
|
|
|
|
|
case SP_MEMORY_ATTRIBUTES_SET_AARCH64: |
|
|
|
INFO("Received SP_MEMORY_ATTRIBUTES_SET_AARCH64 SMC\n"); |
|
|
|
|
|
|
|
if (!sp_ctx.sp_init_in_progress) { |
|
|
|
if (sp_ctx.state != SP_STATE_RESET) { |
|
|
|
WARN("SP_MEMORY_ATTRIBUTES_SET_AARCH64 is available at boot time only\n"); |
|
|
|
SMC_RET1(handle, SPM_NOT_SUPPORTED); |
|
|
|
} |
|
|
|
SMC_RET1(handle, spm_memory_attributes_set_smc_handler(x1, x2, x3)); |
|
|
|
SMC_RET1(handle, |
|
|
|
spm_memory_attributes_set_smc_handler( |
|
|
|
&sp_ctx, x1, x2, x3)); |
|
|
|
default: |
|
|
|
break; |
|
|
|
} |
|
|
|
@ -430,43 +312,7 @@ uint64_t spm_smc_handler(uint32_t smc_fid, |
|
|
|
|
|
|
|
case MM_COMMUNICATE_AARCH32: |
|
|
|
case MM_COMMUNICATE_AARCH64: |
|
|
|
{ |
|
|
|
uint64_t mm_cookie = x1; |
|
|
|
uint64_t comm_buffer_address = x2; |
|
|
|
uint64_t comm_size_address = x3; |
|
|
|
|
|
|
|
/* Cookie. Reserved for future use. It must be zero. */ |
|
|
|
if (mm_cookie != 0U) { |
|
|
|
ERROR("MM_COMMUNICATE: cookie is not zero\n"); |
|
|
|
SMC_RET1(handle, SPM_INVALID_PARAMETER); |
|
|
|
} |
|
|
|
|
|
|
|
if (comm_buffer_address == 0U) { |
|
|
|
ERROR("MM_COMMUNICATE: comm_buffer_address is zero\n"); |
|
|
|
SMC_RET1(handle, SPM_INVALID_PARAMETER); |
|
|
|
} |
|
|
|
|
|
|
|
if (comm_size_address != 0U) { |
|
|
|
VERBOSE("MM_COMMUNICATE: comm_size_address is not 0 as recommended.\n"); |
|
|
|
} |
|
|
|
|
|
|
|
/* Save the Normal world context */ |
|
|
|
cm_el1_sysregs_context_save(NON_SECURE); |
|
|
|
|
|
|
|
/* Lock the Secure Partition context. */ |
|
|
|
spin_lock(&sp_ctx.lock); |
|
|
|
|
|
|
|
/*
|
|
|
|
* Restore the secure world context and prepare for |
|
|
|
* entry in S-EL0 |
|
|
|
*/ |
|
|
|
assert(&sp_ctx.cpu_ctx == cm_get_context(SECURE)); |
|
|
|
cm_el1_sysregs_context_restore(SECURE); |
|
|
|
cm_set_next_eret_context(SECURE); |
|
|
|
|
|
|
|
SMC_RET4(&sp_ctx.cpu_ctx, smc_fid, comm_buffer_address, |
|
|
|
comm_size_address, plat_my_core_pos()); |
|
|
|
} |
|
|
|
return mm_communicate(smc_fid, x1, x2, x3, handle); |
|
|
|
|
|
|
|
case SP_MEMORY_ATTRIBUTES_GET_AARCH64: |
|
|
|
case SP_MEMORY_ATTRIBUTES_SET_AARCH64: |
|
|
|
|
Dimitris Papastamos
7 years ago
GitHub