Merge "feat(intel): increase bl2 size limit" into integration

12 months ago · f4bb899810
3 changed files with 3 additions and 3 deletions
--- a/plat/intel/soc/agilex/include/socfpga_plat_def.h
+++ b/plat/intel/soc/agilex/include/socfpga_plat_def.h
@ -65,7 +65,7 @@
 #define DEVICE4_SIZE				(0x0100000000)

 #define BL2_BASE		(0xffe00000)
-#define BL2_LIMIT		(0xffe1b000)
+#define BL2_LIMIT		(0xffe2b000)

 #define BL31_BASE		(0x1000)
 #define BL31_LIMIT		(0x81000)
--- a/plat/intel/soc/agilex5/include/socfpga_plat_def.h
+++ b/plat/intel/soc/agilex5/include/socfpga_plat_def.h
@ -86,7 +86,7 @@
 #define GIC_SIZE						(0x00100000)

 #define BL2_BASE						(0x00000000)
-#define BL2_LIMIT						(0x0001b000)
+#define BL2_LIMIT						(0x0002b000)

 #define BL31_BASE						(0x80000000)
 #define BL31_LIMIT						(0x82000000)
--- a/plat/intel/soc/stratix10/include/socfpga_plat_def.h
+++ b/plat/intel/soc/stratix10/include/socfpga_plat_def.h
@ -64,7 +64,7 @@
 #define DEVICE4_SIZE				(0x0100000000)

 #define BL2_BASE		(0xffe00000)
-#define BL2_LIMIT		(0xffe1b000)
+#define BL2_LIMIT		(0xffe2b000)

 #define BL31_BASE		(0x1000)
 #define BL31_LIMIT		(0x81000)