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intel: QSPI boot enablement

Manages QSPI initialization, configuration and IO handling as boot device

Signed-off-by: Muhammad Hadi Asyrafi Abdul Halim <muhammad.hadi.asyrafi.abdul.halim@intel.com>
pull/1874/head
Muhammad Hadi Asyrafi Abdul Halim 6 years ago
parent
commit
f5ba408c34
  1. 251
      drivers/intel/soc/stratix10/io/s10_memmap_qspi.c
  2. 2
      plat/intel/soc/stratix10/aarch64/stratix10_private.h
  3. 15
      plat/intel/soc/stratix10/bl2_plat_setup.c
  4. 98
      plat/intel/soc/stratix10/plat_storage.c
  5. 6
      plat/intel/soc/stratix10/platform.mk

251
drivers/intel/soc/stratix10/io/s10_memmap_qspi.c

@ -0,0 +1,251 @@
/*
* Copyright (c) 2019, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
#include <assert.h>
#include <string.h>
#include <platform_def.h>
#include <common/debug.h>
#include <drivers/io/io_driver.h>
#include <drivers/io/io_memmap.h>
#include <drivers/io/io_storage.h>
#include <lib/utils.h>
#include "drivers/qspi/cadence_qspi.h"
/* As we need to be able to keep state for seek, only one file can be open
* at a time. Make this a structure and point to the entity->info. When we
* can malloc memory we can change this to support more open files.
*/
typedef struct {
/* Use the 'in_use' flag as any value for base and file_pos could be
* valid.
*/
int in_use;
uintptr_t base;
size_t file_pos;
size_t size;
} file_state_t;
static file_state_t current_file = {0};
/* Identify the device type as memmap */
static io_type_t device_type_memmap(void)
{
return IO_TYPE_MEMMAP;
}
/* Memmap device functions */
static int memmap_dev_open(const uintptr_t dev_spec, io_dev_info_t **dev_info);
static int memmap_block_open(io_dev_info_t *dev_info, const uintptr_t spec,
io_entity_t *entity);
static int memmap_block_seek(io_entity_t *entity, int mode,
ssize_t offset);
static int memmap_block_len(io_entity_t *entity, size_t *length);
static int memmap_block_read(io_entity_t *entity, uintptr_t buffer,
size_t length, size_t *length_read);
static int memmap_block_write(io_entity_t *entity, const uintptr_t buffer,
size_t length, size_t *length_written);
static int memmap_block_close(io_entity_t *entity);
static int memmap_dev_close(io_dev_info_t *dev_info);
static const io_dev_connector_t memmap_dev_connector = {
.dev_open = memmap_dev_open
};
static const io_dev_funcs_t memmap_dev_funcs = {
.type = device_type_memmap,
.open = memmap_block_open,
.seek = memmap_block_seek,
.size = memmap_block_len,
.read = memmap_block_read,
.write = memmap_block_write,
.close = memmap_block_close,
.dev_init = NULL,
.dev_close = memmap_dev_close,
};
/* No state associated with this device so structure can be const */
static const io_dev_info_t memmap_dev_info = {
.funcs = &memmap_dev_funcs,
.info = (uintptr_t)NULL
};
/* Open a connection to the memmap device */
static int memmap_dev_open(const uintptr_t dev_spec __unused,
io_dev_info_t **dev_info)
{
assert(dev_info != NULL);
*dev_info = (io_dev_info_t *)&memmap_dev_info; /* cast away const */
return 0;
}
/* Close a connection to the memmap device */
static int memmap_dev_close(io_dev_info_t *dev_info)
{
/* NOP */
/* TODO: Consider tracking open files and cleaning them up here */
return 0;
}
/* Open a file on the memmap device */
static int memmap_block_open(io_dev_info_t *dev_info, const uintptr_t spec,
io_entity_t *entity)
{
int result = -ENOMEM;
const io_block_spec_t *block_spec = (io_block_spec_t *)spec;
/* Since we need to track open state for seek() we only allow one open
* spec at a time. When we have dynamic memory we can malloc and set
* entity->info.
*/
if (current_file.in_use == 0) {
assert(block_spec != NULL);
assert(entity != NULL);
current_file.in_use = 1;
current_file.base = block_spec->offset;
/* File cursor offset for seek and incremental reads etc. */
current_file.file_pos = 0;
current_file.size = block_spec->length;
entity->info = (uintptr_t)&current_file;
result = 0;
} else {
WARN("A Memmap device is already active. Close first.\n");
}
return result;
}
/* Seek to a particular file offset on the memmap device */
static int memmap_block_seek(io_entity_t *entity, int mode, ssize_t offset)
{
int result = -ENOENT;
file_state_t *fp;
/* We only support IO_SEEK_SET for the moment. */
if (mode == IO_SEEK_SET) {
assert(entity != NULL);
fp = (file_state_t *) entity->info;
/* Assert that new file position is valid */
assert((offset >= 0) && (offset < fp->size));
/* Reset file position */
fp->file_pos = offset;
result = 0;
}
return result;
}
/* Return the size of a file on the memmap device */
static int memmap_block_len(io_entity_t *entity, size_t *length)
{
assert(entity != NULL);
assert(length != NULL);
*length = ((file_state_t *)entity->info)->size;
return 0;
}
/* Read data from a file on the memmap device */
static int memmap_block_read(io_entity_t *entity, uintptr_t buffer,
size_t length, size_t *length_read)
{
file_state_t *fp;
size_t pos_after;
assert(entity != NULL);
assert(length_read != NULL);
fp = (file_state_t *) entity->info;
/* Assert that file position is valid for this read operation */
pos_after = fp->file_pos + length;
assert((pos_after >= fp->file_pos) && (pos_after <= fp->size));
//memcpy((void *)buffer, (void *)(fp->base + fp->file_pos), length);
cad_qspi_read((void *)buffer, fp->base + fp->file_pos, length);
*length_read = length;
/* Set file position after read */
fp->file_pos = pos_after;
return 0;
}
/* Write data to a file on the memmap device */
static int memmap_block_write(io_entity_t *entity, const uintptr_t buffer,
size_t length, size_t *length_written)
{
file_state_t *fp;
size_t pos_after;
assert(entity != NULL);
assert(length_written != NULL);
fp = (file_state_t *) entity->info;
/* Assert that file position is valid for this write operation */
pos_after = fp->file_pos + length;
assert((pos_after >= fp->file_pos) && (pos_after <= fp->size));
memcpy((void *)(fp->base + fp->file_pos), (void *)buffer, length);
*length_written = length;
/* Set file position after write */
fp->file_pos = pos_after;
return 0;
}
/* Close a file on the memmap device */
static int memmap_block_close(io_entity_t *entity)
{
assert(entity != NULL);
entity->info = 0;
/* This would be a mem free() if we had malloc.*/
zeromem((void *)&current_file, sizeof(current_file));
return 0;
}
/* Exported functions */
/* Register the memmap driver with the IO abstraction */
int register_io_dev_memmap(const io_dev_connector_t **dev_con)
{
int result;
assert(dev_con != NULL);
result = io_register_device(&memmap_dev_info);
if (result == 0)
*dev_con = &memmap_dev_connector;
return result;
}

2
plat/intel/soc/stratix10/aarch64/stratix10_private.h

@ -29,6 +29,6 @@ typedef enum {
} boot_source_type;
void enable_nonsecure_access(void);
void stratix10_io_setup(void);
void stratix10_io_setup(int boot_source);
#endif

15
plat/intel/soc/stratix10/bl2_plat_setup.c

@ -30,6 +30,9 @@
#include "s10_handoff.h"
#include "s10_pinmux.h"
#include "aarch64/stratix10_private.h"
#include "include/s10_mailbox.h"
#include "drivers/qspi/cadence_qspi.h"
const mmap_region_t plat_stratix10_mmap[] = {
MAP_REGION_FLAT(DRAM_BASE, DRAM_SIZE,
@ -109,8 +112,18 @@ void bl2_el3_plat_arch_setup(void)
switch (boot_source) {
case BOOT_SOURCE_SDMMC:
dw_mmc_init(&params, &info);
stratix10_io_setup();
stratix10_io_setup(boot_source);
break;
case BOOT_SOURCE_QSPI:
mailbox_set_qspi_open();
mailbox_set_qspi_direct();
cad_qspi_init(0, QSPI_CONFIG_CPHA, QSPI_CONFIG_CPOL,
QSPI_CONFIG_CSDA, QSPI_CONFIG_CSDADS,
QSPI_CONFIG_CSEOT, QSPI_CONFIG_CSSOT, 0);
stratix10_io_setup(boot_source);
break;
default:
ERROR("Unsupported boot source\n");
panic();

98
plat/intel/soc/stratix10/plat_storage.c

@ -21,17 +21,21 @@
#include <lib/utils.h>
#include <common/tbbr/tbbr_img_def.h>
#include "platform_def.h"
#include "aarch64/stratix10_private.h"
#define STRATIX10_FIP_BASE (0)
#define STRATIX10_FIP_MAX_SIZE (0x1000000)
#define STRATIX10_MMC_DATA_BASE (0xffe3c000)
#define STRATIX10_MMC_DATA_SIZE (0x2000)
#define STRATIX10_QSPI_DATA_BASE (0x3C00000)
#define STRATIX10_QSPI_DATA_SIZE (0x1000000)
#define STRATIX10_FIP_BASE (0)
#define STRATIX10_FIP_MAX_SIZE (0x1000000)
#define STRATIX10_MMC_DATA_BASE (0xffe3c000)
#define STRATIX10_MMC_DATA_SIZE (0x2000)
static const io_dev_connector_t *mmc_dev_con;
static const io_dev_connector_t *fip_dev_con;
static const io_dev_connector_t *boot_dev_con;
static uintptr_t fip_dev_handle;
static uintptr_t mmc_dev_handle;
static uintptr_t boot_dev_handle;
static const io_uuid_spec_t bl2_uuid_spec = {
.uuid = UUID_TRUSTED_BOOT_FIRMWARE_BL2,
@ -46,47 +50,35 @@ static const io_uuid_spec_t bl33_uuid_spec = {
};
uintptr_t a2_lba_offset;
const char a2[] = {0xa2, 0x0};
static const io_block_spec_t gpt_block_spec = {
.offset = 0,
.length = MMC_BLOCK_SIZE
};
static int check_mmc(const uintptr_t spec);
static int check_fip(const uintptr_t spec);
static int check_dev(const uintptr_t spec);
static io_block_spec_t mmc_fip_spec = {
static io_block_dev_spec_t boot_dev_spec;
static int (*register_io_dev)(const io_dev_connector_t **);
static io_block_spec_t fip_spec = {
.offset = STRATIX10_FIP_BASE,
.length = STRATIX10_FIP_MAX_SIZE,
};
const char a2[] = {0xa2, 0x0};
static const io_block_dev_spec_t mmc_dev_spec = {
.buffer = {
.offset = STRATIX10_MMC_DATA_BASE,
.length = MMC_BLOCK_SIZE,
},
.ops = {
.read = mmc_read_blocks,
.write = mmc_write_blocks,
},
.block_size = MMC_BLOCK_SIZE,
};
struct plat_io_policy {
uintptr_t *dev_handle;
uintptr_t image_spec;
int (*check)(const uintptr_t spec);
uintptr_t *dev_handle;
uintptr_t image_spec;
int (*check)(const uintptr_t spec);
};
static const struct plat_io_policy policies[] = {
[FIP_IMAGE_ID] = {
&mmc_dev_handle,
(uintptr_t)&mmc_fip_spec,
check_mmc
&boot_dev_handle,
(uintptr_t)&fip_spec,
check_dev
},
[BL2_IMAGE_ID] = {
&fip_dev_handle,
@ -104,20 +96,20 @@ static const struct plat_io_policy policies[] = {
check_fip
},
[GPT_IMAGE_ID] = {
&mmc_dev_handle,
&boot_dev_handle,
(uintptr_t) &gpt_block_spec,
check_mmc
check_dev
},
};
static int check_mmc(const uintptr_t spec)
static int check_dev(const uintptr_t spec)
{
int result;
uintptr_t local_handle;
result = io_dev_init(mmc_dev_handle, (uintptr_t)NULL);
result = io_dev_init(boot_dev_handle, (uintptr_t)NULL);
if (result == 0) {
result = io_open(mmc_dev_handle, spec, &local_handle);
result = io_open(boot_dev_handle, spec, &local_handle);
if (result == 0)
io_close(local_handle);
}
@ -138,26 +130,48 @@ static int check_fip(const uintptr_t spec)
return result;
}
void stratix10_io_setup(void)
void stratix10_io_setup(int boot_source)
{
int result;
result = register_io_dev_block(&mmc_dev_con);
switch (boot_source) {
case BOOT_SOURCE_SDMMC:
register_io_dev = &register_io_dev_block;
boot_dev_spec.buffer.offset = STRATIX10_MMC_DATA_BASE;
boot_dev_spec.buffer.length = MMC_BLOCK_SIZE;
boot_dev_spec.ops.read = mmc_read_blocks;
boot_dev_spec.ops.write = mmc_write_blocks;
boot_dev_spec.block_size = MMC_BLOCK_SIZE;
break;
case BOOT_SOURCE_QSPI:
register_io_dev = &register_io_dev_memmap;
fip_spec.offset = fip_spec.offset + STRATIX10_QSPI_DATA_BASE;
break;
default:
ERROR("Unsupported boot source\n");
panic();
break;
}
result = (*register_io_dev)(&boot_dev_con);
assert(result == 0);
result = register_io_dev_fip(&fip_dev_con);
assert(result == 0);
result = io_dev_open(mmc_dev_con, (uintptr_t)&mmc_dev_spec,
&mmc_dev_handle);
result = io_dev_open(boot_dev_con, (uintptr_t)&boot_dev_spec,
&boot_dev_handle);
assert(result == 0);
result = io_dev_open(fip_dev_con, (uintptr_t)NULL, &fip_dev_handle);
assert(result == 0);
partition_init(GPT_IMAGE_ID);
mmc_fip_spec.offset = get_partition_entry(a2)->start;
if (boot_source == BOOT_SOURCE_SDMMC) {
partition_init(GPT_IMAGE_ID);
fip_spec.offset = get_partition_entry(a2)->start;
}
(void)result;
}

6
plat/intel/soc/stratix10/platform.mk

@ -31,7 +31,7 @@ BL2_SOURCES += \
drivers/io/io_block.c \
drivers/io/io_fip.c \
drivers/gpio/gpio.c \
drivers/io/io_memmap.c \
drivers/intel/soc/stratix10/io/s10_memmap_qspi.c \
plat/intel/soc/stratix10/bl2_plat_setup.c \
plat/intel/soc/stratix10/plat_storage.c \
plat/intel/soc/stratix10/bl2_plat_mem_params_desc.c \
@ -44,7 +44,9 @@ BL2_SOURCES += \
lib/cpus/aarch64/cortex_a53.S \
plat/intel/soc/stratix10/stratix10_image_load.c \
plat/intel/soc/stratix10/soc/s10_system_manager.c \
common/desc_image_load.c
common/desc_image_load.c \
plat/intel/soc/stratix10/soc/s10_mailbox.c \
plat/intel/soc/stratix10/drivers/qspi/cadence_qspi.c
BL31_SOURCES += drivers/arm/cci/cci.c \
lib/cpus/aarch64/cortex_a53.S \

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