A PSA crypto API is used for hash verification, namely
'psa_hash_compute', which internally calculates hash of the given
data payload.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: Ic90e43e68b836ee2add4b868663cfca2340c8108
A PSA crypto API is used for hash verification, namely
psa_hash_verify, which internally calculates and verifies the hash
of the given data payload.
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Change-Id: Ib48aa6b74b59aea6036333ff00f6ca566b910e60
Initialised Mbedtls PSA cryto during Crypto init using
function call 'psa_crypto_init'.
MbedTLS currently requires a Random Number Generator (RNG) once
PSA Crypto support is enabled. However, TF-A itself doesn't engage
in cryptographic operations that demand randomness. Consequently,
we simulate the presence of an external TRNG (through the configuration
option 'MBEDTLS_PSA_CRYPTO_EXTERNAL_RNG) while, in reality, we offer
a dummy implementation of mbedtls_psa_external_get_random() that always
returns an error.
Change-Id: Ife6d03909c0e6081438d2b2519ef500e5dcdb88f
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
An ad-hoc MbedTLS PSA crypto driver is registered by compiling
a new driver file, namely mbedtls_psa_crypto.c when PSA_CRYPTO=1.
As of now, this file is the same as mbedtls_crypto.c, but subsequent
patches will update crypto functions in this file to trigger
PSA crypto APIs.
Change-Id: I404c347990661d87dcf5d0501d238e36914ec3ee
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Cortex-X3 erratum 2070301 is a Cat B erratum that applies to all
revisions <= r1p2 and is still open.
The workaround is to write the value 4'b1001 to the PF_MODE bits
in the IMP_CPUECTLR2_EL1 register. This places the data prefetcher
in the most conservative mode instead of disabling it.
SDEN documentation:
https://developer.arm.com/documentation/2055130/latest
Change-Id: I337c4c7bb9221715aaf973a55d0154e1c7555768
Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
Add VERSION_PATCH macro in Makefile. This will help LTS releases.
While at it, handle VERSION_PATCH macro in .versionrc.js script.
Change-Id: Id3ec359f7768a90ba5c67e35d29736a46eb402b5
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Address an issue where incorrect macro name is being used for
setting the UART buad rate. Updated the code to use the
appropriate macro name, ensuring that baud rate name is proper.
Fixes: 04a483359f ("feat(xilinx): sync macro names")
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: I27dd8b1559beb0cf7b872de037adc95a948ecc2f
This is a preparatory patch to provide MbedTLS PSA Crypto
API support, with below changes -
1. Added a build macro PSA_CRYPTO to enable the MbedTLS PSA
Crypto API support in the subsequent patches.
2. Compile necessary PSA crypto files from MbedTLS source code
when PSA_CRYPTO=1.
Also, marked PSA_CRYPTO as an experimental feature.
Change-Id: I45188f56c5c98b169b2e21e365150b1825c6c450
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
Added scope for MbedTLS PSA Crypto API implementation.
Change-Id: I0a7c6242841dfb94f6ca5e9174ffd520c5fe00fa
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
* changes:
fix(st): enable RTC clock before accessing nv counter
fix(st-crypto): use GENMASK_32 to define PKA registers masks
fix(st): update comment on encryption key
fix(st): allow crypto lib compilation in aarch64
fix(st-uart): allow 64 bit compilation
fix(st): reduce MMC block_buffer
fix(stm32mp13-fdts): cosmetic fixes in PLL nodes
fix(st): update dt_get_ddr_size() type
fix(nand): reset the SLC NAND
fix(st-crypto): do not read RNG data if it's not ready
SMCCCv1.3 introduces SVE hint bit that denotes the absence of SVE
specific live state. Update the SMC function ID with SVE hint bit if it
is set the flags and pass it to RMM.
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: Ibb1d73440ed1e2283a103cfd2c4592be5d3a74cb
To ensure that all explicit memory accesses are complete before udelay,
insert dsb before udelay.
Change-Id: If119e920e29539ae8b68d3c44c8f77b5bf424a1a
Signed-off-by: Karl Li <karl.li@mediatek.com>
This patch enables Scalable Matrix Extension (SME) for RMM. RMM will
save/restore required registers that are shared with SVE/FPU register
state so that Realm can use FPU or SVE.
The Relevant RMM support can be found here :
https://github.com/TF-RMM/tf-rmm/commit/0ccd7ae58b00
Signed-off-by: Arunachalam Ganapathy <arunachalam.ganapathy@arm.com>
Change-Id: I3bbdb840e7736dec00b71c85fcec3d5719413ffd
If console is not found there is no way where to print information about
it. Currently only cdns/dcc/pl011 uarts are supported that's why remove
the message which none can see anyway.
But keep "else" part with comment to avoid misra c rule 15.7 violation
which is also missing in Versal NET implementation.
Change-Id: I78e3baffd2288d2a4673099bf193f22029912840
Signed-off-by: Michal Simek <michal.simek@amd.com>
Update version and release schedule for the upcoming TF-A
release v2.10.
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
Change-Id: I505fbb034a74ce1cc6bc20efdd26803e6fb8c0c1
* changes:
refactor(el3-runtime): plat_ic_has_interrupt_type returns bool
fix(el3-runtime): leverage generic interrupt controller helpers
fix(gicv3): map generic interrupt type to GICv3 group
chore(gicv2): use interrupt group instead of type
Remove the dcc_console_init() function. The initialization function
is not being used and serves no purpose.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: I056d09e153998d686d3b95ad39c563f797184c18
Revise the AST2700 boot flow to the RESET_TO_BL31 scheme.
The execution of BL1/2 can be saved from ARM CA35 while most
low level platform initialization are moved to a preceding MCU.
This patch updates the build configuration and also adds
the SMP mailbox setup code to hold secondary cores until
they are being waken up.
Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
Change-Id: I7e0aa6416b92b97036153db1d9a26baaa41b7b18
Implement firmware handoff from BL2 to BL33 on qemu platform
compliant to Firmware handoff specification v0.9.
Change-Id: Id8d5206a71ef6ec97cf3c97995de328ebf0600cc
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
The plat_get_nv_ctr() retrieves the non-volatile counter value from
TAMP_COUNTR register in RTCTAMP peripheral. The clock needs to be
enabled before accessing it.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I2e9fc2c7ac516d6f8624cc6c9d442ee85629bf9a
When compiling the driver in aarch64, and with LOG_LEVEL_VERBOSE, there
is a compilation error on the message displaying the version of the
peripheral. The masks are making the variable unsigned long, whereas
we want to display an unsigned int. As the registers are 32-bit,
we should use GENMASK_32 instead of GENMASK.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I002dd5ad901f68a9480f758eaaa4428f969813c1
On STM32MP2, the encryption key is 32 bytes, the key duplication
(done for 16 bytes OTP) is not done. Update the comment to precise that.
Change-Id: I6fc4d652fdd462808918e85f6e5bd0d68d10d436
Yann Gautier <yann.gautier@foss.st.com>
Add unregistration function for the JTAG DCC (Debug Communication
Channel) console.
The unregistration function flushes DCC buffer before unregistering
the dcc console to make sure that no output char is pending.
Since console_flush() flushes chars for all registered consoles on
the platform, which is not required in this case, dcc_console_flush()
is being called instead.
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: I6f15a07c6ee947dc0e7aa8fb069227618080e611
Cast len with size_t, as it is unsigned long on Aarch64, and no more
unsigned int. Changing functions prototypes will not help as
.verify_signature awaits an unsigned int for its last parameter.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I9332fd46301a9653af917802788fd97fe7c8a162
Change a %x in %zx to print a size_t variable.
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Change-Id: I27ac3739f4a2ec3b33c34d2257fa858cbd1aae6a
This buffer used by io_block should be the size on one block (512 bytes)
not 512*4 due to the use of uint32_t. Change that to uint8_t. This
reduces the size of BSS by 1.5KiB.
Change-Id: I8492f13f5386679b0c81efba66911422412782f9
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Move to size_t to ensure a generic algorithm whatever the platform
architecture.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I7879367849ed86750dcff2b6a15f4b998bf6da18
Signed-off-by: Sebastien PASDELOUP <sebastien.pasdeloup-ext@st.com>
The reset command should be the first command sent to the SLC NAND.
Resetting the SLC NAND should not be done only if NAND_ONFI_DETECT
is enabled.
Change-Id: If225a1b1a7e04181cc5839e282c435c5c8958bd7
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Having RNG_SR_DRDY bit in RNG_SR register does not mean that there are 4
RNG words ready to be read. Add a check on RNG_SR_DRDY between each word
reading.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Change-Id: I46af7ca6c0ddbe19540b248365a5016b15b9a707
There is no reason to have platform specific macros where generic
macros can be used. This is pretty much preparation step for moving
console code to single location where multiple combinations can be
easier to handle.
Change-Id: I4d85ddef29f5870a9ea9590d4d1564469c6eb87e
Signed-off-by: Michal Simek <michal.simek@amd.com>
The JTAG DCC (Debug Communication Channel) console is primary used
for debugging that's why make no sense not to setup it up as crash
console too.
Change-Id: I16e5d83f8da721657b1a10609494f835b87e5578
Signed-off-by: Michal Simek <michal.simek@amd.com>
Add new scope for the JTAG DCC (Debug Communication Channel).
Driver is available for quite some time at
drivers/arm/dcc/dcc_console.c.
Change-Id: I8be71dadb56bed2b64a26c8a009bda6bbc96240d
Signed-off-by: Michal Simek <michal.simek@amd.com>
Remove the use of SMC_RET2 in the mtk_emi_mpu_sip_handler function. The
current smc driver in the atf driver has switched to using SMC_RET4 for
smc call clients. This change aligns the return value handling with the
updated driver behavior that ensures consistency and avoids potential
issues with the old return value.
Change-Id: I87f25b438d2119837c45bed80a8224fcfd141fb6
Signed-off-by: Dawei Chien <dawei.chien@mediatek.com>
Signed-off-by: Jason Chen <Jason-ch.Chen@mediatek.com>
Manish V Badarkhe
Sona Mathew
Manish Pandey
Yann Gautier
Joanna Farley
Prasad Kummari
Soby Mathew
Arunachalam Ganapathy
Karl Li
Madhukar Pappireddy
Olivier Deprez
Michal Simek
Lionel Debieve
Chia-Wei Wang
Raymond Mao
Yann Gautier
Gabriel Fernandez
Sebastien PASDELOUP
Christophe Kerello
Gatien Chevallier
Dawei Chien